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Date: Thu, 26 May 2022 10:29:09 +0700 From: Suravee Suthikulpanit <suravee.suthikulpanit@....com> To: Joerg Roedel <joro@...tes.org> Cc: linux-kernel@...r.kernel.org, iommu@...ts.linux-foundation.org, vasant.hegde@....com, jon.grimm@....com Subject: Re: [PATCH v2] iommu/amd: Set translation valid bit only when IO page tables are in used Joerg, On 5/20/22 3:09 PM, Joerg Roedel wrote: > Hi Suravee, > > On Mon, May 16, 2022 at 07:27:51PM +0700, Suravee Suthikulpanit wrote: > >> - Also, it seems that the current iommu v2 page table use case, where GVA->GPA=SPA >> will no longer be supported on system w/ SNPSup=1. Any thoughts? > > Support for that is not upstream yet, it should be easy to disallow this > configuration and just use the v1 page-tables when SNP is active. This > can be handled entirely inside the AMD IOMMU driver. > Actually, I am referring to when user uses the IOMMU v2 table for shared virtual address in current iommu_v2 driver (e.g. amd_iommu_init_device(), amd_iommu_bind_pasid). Best Regards, Suravee
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