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Message-ID: <CAK9rFnzmz0cUYe6i8qjXbwsfJgZaSk7DfJuZk5N6YV-Jwu2_kQ@mail.gmail.com>
Date: Wed, 25 May 2022 17:27:32 -0700
From: Brad Larson <brad@...sando.io>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc: Linux ARM <linux-arm-kernel@...ts.infradead.org>,
Arnd Bergmann <arnd@...db.de>,
Linus Walleij <linus.walleij@...aro.org>,
Bartosz Golaszewski <bgolaszewski@...libre.com>,
Mark Brown <broonie@...nel.org>,
Serge Semin <fancer.lancer@...il.com>,
Adrian Hunter <adrian.hunter@...el.com>,
Ulf Hansson <ulf.hansson@...aro.org>,
Olof Johansson <olof@...om.net>,
David Clear <dac2@...sando.io>,
"open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
linux-spi <linux-spi@...r.kernel.org>,
linux-mmc <linux-mmc@...r.kernel.org>,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 05/11] dt-bindings: spi: dw: Add Pensando Elba SoC SPI
Controller bindings
Hi Krzysztof,
On Thu, Apr 7, 2022 at 11:52 AM Krzysztof Kozlowski
<krzysztof.kozlowski@...aro.org> wrote:
>
> On 07/04/2022 01:36, Brad Larson wrote:
> > --- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
> > +++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
> > @@ -37,6 +37,21 @@ allOf:
> > else:
> > required:
> > - interrupts
> > + - if:
> > + properties:
> > + compatible:
> > + contains:
> > + enum:
> > + - pensando,elba-spi
> > + then:
> > + properties:
> > + pensando,syscon-spics:
> > + $ref: /schemas/types.yaml#/definitions/phandle
> > + description:
> > + Phandle to the system control device node which provides access to
> > + the spics control register
>
> It looks you only need to poke one register from spics, so it could be
> something like:
>
> items:
> - items:
> - description: Phandle to the system control device node
> - description: spics control register offset
This looks better, I'll change to this approach for updated patchset.
Regards,
Brad
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