lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Thu, 26 May 2022 11:56:33 +0200
From:   Peter Zijlstra <peterz@...radead.org>
To:     Ravi Bangoria <ravi.bangoria@....com>
Cc:     acme@...nel.org, jolsa@...nel.org, namhyung@...nel.org,
        eranian@...gle.com, irogers@...gle.com, jmario@...hat.com,
        leo.yan@...aro.org, alisaidi@...zon.com, ak@...ux.intel.com,
        kan.liang@...ux.intel.com, dave.hansen@...ux.intel.com,
        hpa@...or.com, mingo@...hat.com, mark.rutland@....com,
        alexander.shishkin@...ux.intel.com, tglx@...utronix.de,
        bp@...en8.de, x86@...nel.org, linux-perf-users@...r.kernel.org,
        linux-kernel@...r.kernel.org, sandipan.das@....com,
        ananth.narayan@....com, kim.phillips@....com,
        santosh.shukla@....com
Subject: Re: [PATCH 06/13] perf/x86/amd: Support PERF_SAMPLE_PHY_ADDR using
 IBS_DC_PHYSADDR

On Thu, May 26, 2022 at 02:16:28PM +0530, Ravi Bangoria wrote:
> On 25-May-22 4:51 PM, Peter Zijlstra wrote:
> > On Wed, May 25, 2022 at 03:09:31PM +0530, Ravi Bangoria wrote:
> >> IBS_DC_PHYSADDR provides the physical data address for the tagged load/
> >> store operation. Populate perf sample physical address using it.
> >>
> >> Signed-off-by: Ravi Bangoria <ravi.bangoria@....com>
> >> ---
> >>  arch/x86/events/amd/ibs.c | 26 +++++++++++++++++++++++++-
> >>  1 file changed, 25 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
> >> index b57736357e25..c719020c0e83 100644
> >> --- a/arch/x86/events/amd/ibs.c
> >> +++ b/arch/x86/events/amd/ibs.c
> >> @@ -986,13 +986,35 @@ static void perf_ibs_get_data_addr(struct perf_event *event,
> >>  	data->addr = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSDCLINAD)];
> >>  }
> >>  
> >> +static void perf_ibs_get_phy_addr(struct perf_event *event,
> >> +				  struct perf_ibs_data *ibs_data,
> >> +				  struct perf_sample_data *data)
> >> +{
> >> +	union perf_mem_data_src *data_src = &data->data_src;
> >> +	u64 op_data3 = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSOPDATA3)];
> >> +	u64 phy_addr_valid = op_data3 & IBS_DC_PHY_ADDR_VALID_MASK;
> >> +
> >> +	if (!(event->attr.sample_type & PERF_SAMPLE_DATA_SRC))
> >> +		perf_ibs_get_mem_op(op_data3, data);
> >> +
> >> +	if ((data_src->mem_op != PERF_MEM_OP_LOAD &&
> >> +	    data_src->mem_op != PERF_MEM_OP_STORE) ||
> >> +	    !phy_addr_valid) {
> >> +		data->phys_addr = 0x0;
> >> +		return;
> >> +	}
> >> +
> >> +	data->phys_addr = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSDCPHYSAD)];
> >> +}
> > 
> > perf_prepare_sample() will unconditionally overwrite data->phys_addr.
> > There is currently no facility to let the driver set this field.
> 
> Thanks for pointing it Peter. Would you mind if I add:

I think it's best if you extend/mimic the __PERF_SAMPLE_CALLCHAIN_EARLY
hack. It's more or less the same problem and then at least the solution
is consistent.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ