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Message-Id: <20220526012946.3862776-3-chris.packham@alliedtelesis.co.nz>
Date: Thu, 26 May 2022 13:29:45 +1200
From: Chris Packham <chris.packham@...iedtelesis.co.nz>
To: robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
linus.walleij@...aro.org, brgl@...ev.pl, thierry.reding@...il.com,
u.kleine-koenig@...gutronix.de, lee.jones@...aro.org,
andrew@...n.ch, thomas.petazzoni@...e-electrons.com
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-gpio@...r.kernel.org, linux-pwm@...r.kernel.org,
Chris Packham <chris.packham@...iedtelesis.co.nz>
Subject: [PATCH v4 2/3] dt-bindings: gpio: gpio-mvebu: deprecate armadaxp-gpio
Commit 5f79c651e81e ("arm: mvebu: use global interrupts for GPIOs on
Armada XP") the marvell,armadaxp-gpio compatible obsolete.
The driver code still exists to handle the armadaxp behaviour but all
the in-tree boards use the marvell,armada-370-gpio. Document the
marvell,armadaxp-gpio compatible as deprecated.
Signed-off-by: Chris Packham <chris.packham@...iedtelesis.co.nz>
---
Notes:
This could potentially be squashed into the first commit but it seemed
more proper to do a straight 1:1 conversion of the old binding then
clean things up to match reality.
Changes in v4:
- New
.../devicetree/bindings/gpio/gpio-mvebu.yaml | 24 +++++++------------
1 file changed, 8 insertions(+), 16 deletions(-)
diff --git a/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml b/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml
index d1695e7bd825..459ec35864fe 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml
+++ b/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml
@@ -21,17 +21,21 @@ properties:
- enum:
- marvell,mv78200-gpio
- marvell,armada-370-gpio
- - marvell,armadaxp-gpio
- const: marvell,orion-gpio
+ - description: Deprecated binding
+ items:
+ - const: marvell,armadaxp-gpio
+ - const: marvell,orion-gpio
+ deprecated: true
+
reg:
description: |
Address and length of the register set for the device. Not used for
marvell,armada-8k-gpio.
- For the "marvell,armadaxp-gpio" variant a second entry is expected for
- the per-cpu registers. For other variants second entry can be provided,
- for the PWM function using the GPIO Blink Counter on/off registers.
+ A second entry can be provided, for the PWM function using the GPIO Blink
+ Counter on/off registers.
minItems: 1
maxItems: 2
@@ -103,18 +107,6 @@ allOf:
required:
- reg
- - if:
- properties:
- compatible:
- contains:
- const: marvell,armadaxp-gpio
- then:
- properties:
- reg:
- minItems: 2
- reg-names:
- minItems: 2
-
unevaluatedProperties: true
examples:
--
2.36.1
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