linux-kernel - Re: [PATCH v1] spi: imx: mx51-ecspi: fix clk polarity and phase configuration for CS

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Message-ID: <Yo+h9ssyWfb19aey@sirena.org.uk>
Date:   Thu, 26 May 2022 16:51:18 +0100
From:   Mark Brown <broonie@...nel.org>
To:     Oleksij Rempel <o.rempel@...gutronix.de>
Cc:     Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <s.hauer@...gutronix.de>, kernel@...gutronix.de,
        linux-kernel@...r.kernel.org, linux-spi@...r.kernel.org,
        NXP Linux Team <linux-imx@....com>,
        Fabio Estevam <festevam@...il.com>
Subject: Re: [PATCH v1] spi: imx: mx51-ecspi: fix clk polarity and phase
 configuration for CS > 4

On Mon, May 23, 2022 at 09:31:43AM +0200, Oleksij Rempel wrote:
> Fix support for boards with more then 4 chip select lines. Other wise if
> CS > 4 is used, we will write trash to the clk configuration register.

This doesn't apply against current code, please check and resend.

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