linux-kernel - [PATCH v11 2/3] ARM: dts: nuvoton: Add memory controller node

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Message-Id: <20220527061148.14948-3-ctcchien@nuvoton.com>
Date:   Fri, 27 May 2022 14:11:47 +0800
From:   medadyoung@...il.com
To:     rric@...nel.org, james.morse@....com, tony.luck@...el.com,
        mchehab@...nel.org, bp@...en8.de, robh+dt@...nel.org,
        benjaminfair@...gle.com, yuenn@...gle.com, venture@...gle.com,
        KWLIU@...oton.com, YSCHU@...oton.com, JJLIU0@...oton.com,
        KFTING@...oton.com, avifishman70@...il.com, tmaimon77@...il.com,
        tali.perry1@...il.com, ctcchien@...oton.com
Cc:     linux-edac@...r.kernel.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, openbmc@...ts.ozlabs.org
Subject: [PATCH v11 2/3] ARM: dts: nuvoton: Add memory controller node

From: Medad CChien <ctcchien@...oton.com>

ECC must be configured in the BootBlock header.
Then, you can read error counts via the EDAC kernel framework.

Signed-off-by: Medad CChien <ctcchien@...oton.com>
---
 arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
index 3696980a3da1..ba542b26941e 100644
--- a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
+++ b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi
@@ -106,6 +106,13 @@
 		interrupt-parent = <&gic>;
 		ranges;
 
+		mc: memory-controller@...24000 {
+			compatible = "nuvoton,npcm750-memory-controller";
+			reg = <0x0 0xf0824000 0x0 0x1000>;
+			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+			status = "disabled";
+		};
+
 		rstc: rstc@...01000 {
 			compatible = "nuvoton,npcm750-reset";
 			reg = <0xf0801000 0x70>;
-- 
2.17.1