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Message-ID: <20220528100140.GC175008@yilunxu-OptiPlex-7050>
Date: Sat, 28 May 2022 18:01:40 +0800
From: Xu Yilun <yilun.xu@...el.com>
To: tien.sung.ang@...el.com
Cc: mdf@...nel.org, hao.wu@...el.com, trix@...hat.com,
linux-fpga@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] fpga: altera-cvp: Truncated bitstream error support
On Thu, May 19, 2022 at 12:34:12PM +0800, tien.sung.ang@...el.com wrote:
> The send_buf is always used throughout the life-span of the CvP driver.
> Hence, we thought it would be wise to just pre-allocate it one time
> at the start of the probe/init.
> It is also fine if we do it in the altera_cvp_write. The only issue we
> see in this is that, a minor hit on the performance as you need to
> then, allocate the buffer on every new CvP FPGA configuration write.
>
> As for STEP 16, the previous implementation checks the Error latch bit
> which stores the previous transaction's result. If an error occurs
> prior to this, the driver would throw an error which is not right.
> The correct step is to just check for the current CvP error status
> from the register.
> Hope that is fine with you. Thanks
Please comment inline in the mail, like others do.
Thanks,
Yilun
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