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Message-ID: <20220530073429.17514-2-r-ravikumar@ti.com>
Date:   Mon, 30 May 2022 13:04:27 +0530
From:   Rahul T R <r-ravikumar@...com>
To:     <robh+dt@...nel.org>, <nm@...com>, <vigneshr@...com>,
        <kishon@...com>, <krzysztof.kozlowski+dt@...aro.org>
CC:     <lee.jones@...aro.org>, <rogerq@...nel.org>,
        <devicetree@...r.kernel.org>, <kristo@...nel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <s-anna@...com>,
        Rahul T R <r-ravikumar@...com>
Subject: [PATCH v2 1/3] dt-bindings: mfd: ti,j721e-system-controller: Add clock property

Add a pattern property for clock, also update the example with
a clock node

Signed-off-by: Rahul T R <r-ravikumar@...com>
---
 .../bindings/mfd/ti,j721e-system-controller.yaml       | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml b/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml
index fa86691ebf16..290b22cab52f 100644
--- a/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml
+++ b/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml
@@ -48,6 +48,10 @@ patternProperties:
     description:
       This is the SERDES lane control mux.
 
+  "^clock@[0-9a-f]+$":
+    type: object
+    $ref: /schemas/clock/ti,am654-ehrpwm-tbclk.yaml#
+
 required:
   - compatible
   - reg
@@ -79,5 +83,11 @@ examples:
                 <0x40c0 0x3>, <0x40c4 0x3>, <0x40c8 0x3>, <0x40cc 0x3>;
                 /* SERDES4 lane0/1/2/3 select */
         };
+
+        clock@...0 {
+            compatible = "ti,am654-ehrpwm-tbclk", "syscon";
+            reg = <0x4140 0x18>;
+            #clock-cells = <1>;
+        };
     };
 ...
-- 
2.17.1

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