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Message-ID: <4fca264e-6c07-a68d-f8a1-52db555a2b2c@tronnes.org>
Date: Mon, 30 May 2022 13:51:01 +0200
From: Noralf Trønnes <noralf@...nnes.org>
To: Yunhao Tian <t123yh.xyz@...il.com>
Cc: Thomas Zimmermann <tzimmermann@...e.de>,
David Airlie <airlied@...ux.ie>, linux-kernel@...r.kernel.org,
dri-devel@...ts.freedesktop.org, Sam Ravnborg <sam@...nborg.org>,
David Lechner <david@...hnology.com>
Subject: Re: [PATCH v2] drm/mipi-dbi: align max_chunk to 2 in spi_transfer
Den 10.05.2022 05.02, skrev Yunhao Tian:
> In __spi_validate, there's a validation that no partial transfers
> are accepted (xfer->len % w_size must be zero). When
> max_chunk is not a multiple of bpw (e.g. max_chunk = 65535,
> bpw = 16), the transfer will be rejected.
>
> This patch aligns max_chunk to 2 bytes (the maximum value of bpw is 16),
> so that no partial transfer will occur.
>
> Fixes: d23d4d4dac01 ("drm/tinydrm: Move tinydrm_spi_transfer()")
>
> Signed-off-by: Yunhao Tian <t123yh.xyz@...il.com>
> ---
Thanks, applied to drm-misc-next.
Noralf.
> drivers/gpu/drm/drm_mipi_dbi.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_mipi_dbi.c b/drivers/gpu/drm/drm_mipi_dbi.c
> index 71b646c4131f..00d470ff071d 100644
> --- a/drivers/gpu/drm/drm_mipi_dbi.c
> +++ b/drivers/gpu/drm/drm_mipi_dbi.c
> @@ -1183,6 +1183,13 @@ int mipi_dbi_spi_transfer(struct spi_device *spi, u32 speed_hz,
> size_t chunk;
> int ret;
>
> + /* In __spi_validate, there's a validation that no partial transfers
> + * are accepted (xfer->len % w_size must be zero).
> + * Here we align max_chunk to multiple of 2 (16bits),
> + * to prevent transfers from being rejected.
> + */
> + max_chunk = ALIGN_DOWN(max_chunk, 2);
> +
> spi_message_init_with_transfers(&m, &tr, 1);
>
> while (len) {
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