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Message-ID: <4a78703b-7c58-913c-3c36-1fec4455b946@broadcom.com>
Date:   Wed, 1 Jun 2022 09:20:14 -0700
From:   William Zhang <william.zhang@...adcom.com>
To:     Florian Fainelli <f.fainelli@...il.com>,
        Linux ARM List <linux-arm-kernel@...ts.infradead.org>
Cc:     dan.beygelman@...adcom.com, philippe.reynes@...tathome.com,
        anand.gore@...adcom.com, tomer.yacoby@...adcom.com,
        samyon.furman@...adcom.com, kursad.oney@...adcom.com,
        joel.peshkin@...adcom.com,
        Broadcom internal kernel review list 
        <bcm-kernel-feedback-list@...adcom.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 2/3] arm64: dts: add dts files for bcmbca SoC bcm4912



On 6/1/22 02:47, Florian Fainelli wrote:
> 
> 
> On 5/31/2022 5:42 PM, William Zhang wrote:
>> Add dts for ARMv8 based broadband SoC BCM4912. bcm4912.dtsi is the
>> SoC description dts header and bcm94912.dts is a simple dts file for
>> Broadcom BCM94912 Reference board that only enable the UART port.
>>
>> Signed-off-by: William Zhang <william.zhang@...adcom.com>
>>
>> ---
> 
> [snip]
> 
>> +
>> +    axi@...00000 {
>> +        compatible = "simple-bus";
>> +        #address-cells = <2>;
>> +        #size-cells = <2>;
> 
> See comment below for the ubus node.
> 
>> +        ranges = <0x0 0x0 0x0 0x81000000 0x0 0x8000>;
>> +
>> +        gic: interrupt-controller@...0 {
>> +            compatible = "arm,gic-400";
>> +            #interrupt-cells = <3>;
>> +            interrupt-controller;
>> +            interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | 
>> IRQ_TYPE_LEVEL_HIGH)>;
>> +            reg = <0x0 0x1000 0x0 0x1000>,
>> +                <0x0 0x2000 0x0 0x2000>,
>> +                <0x0 0x4000 0x0 0x2000>,
>> +                <0x0 0x6000 0x0 0x2000>;
>> +        };
>> +    };
>> +
>> +    bus@...00000 {
>> +        compatible = "simple-bus";
>> +        #address-cells = <2>;
>> +        #size-cells = <2>;
> 
> This does not quite make sense, as I doubt that this part of the bus is 
> 64-bit capable, rather, I would expect to find both #address-cells and 
> #size-cells to be set to 1 and ... (see below)
> 
Agree.  It can be simplified to use 32 bit address and size.

>> +        ranges = <0x0 0x0 0x0 0xff800000 0x0 0x800000>;
>> +
>> +        uart0: serial@...00 {
>> +            compatible = "arm,pl011", "arm,primecell";
>> +            reg = <0x0 0x12000 0x0 0x1000>;
> 
> ... have this become simply:
> 
>              reg = <0x12000 0x1000>:
> 
> which also looks awfully big for an UART block, an entire 4KB worth of 
> register space?
That is the correct based on the rdb.

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