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Message-ID: <48570ec3-8159-11ae-8069-7f001081fd56@sholland.org>
Date: Tue, 31 May 2022 23:42:34 -0500
From: Samuel Holland <samuel@...lland.org>
To: Jernej Škrabec <jernej.skrabec@...il.com>,
Linus Walleij <linus.walleij@...aro.org>,
Chen-Yu Tsai <wens@...e.org>
Cc: Andre Przywara <andre.przywara@....com>,
Maxime Ripard <mripard@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
Rob Herring <robh+dt@...nel.org>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-gpio@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-sunxi@...ts.linux.dev
Subject: Re: [PATCH 0/3] pinctrl: sunxi: Remove non-existent reset line
references
Hi Jernej,
On 5/31/22 10:22 AM, Jernej Škrabec wrote:
> Dne torek, 31. maj 2022 ob 07:36:20 CEST je Samuel Holland napisal(a):
>> I assume these properties came from a lack of documentation, and the
>> very reasonable assumption that where there's a clock gate bit in the
>> CCU, there's a reset bit. But the pin controllers are special and don't
>> have a module reset line. The only way to reset the pin controller is to
>> reset the whole VDD_SYS power domain.
>>
>> This series is preparation for converting the PRCM MFD and legacy clock
>> drivers to a CCU clock/reset driver like all of the other Allwinner
>> SoCs. I don't plan to add reset lines that don't actually exist to the
>> new CCU driver. So we might as well get rid of the references now.
>> Technically this breaks devicetree compatibility, since the old drivers
>> expect the reset. But the CCU conversion will be a compatibility break
>> anyway, so it's a bit of a moot point.
>
> If I understand correclty, this would cause only DT forward compatibility
> issue, which happens now and then anyway. Kernel would still be compatible
> with older DTs, it would just ignore that reset, right?
Right, this only prevents older kernels from working with newer devicetrees. I
brought it up because I'm generally trying to minimize how much we do that.
Regards,
Samuel
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