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Message-Id: <1654080312-5408-2-git-send-email-quic_rohiagar@quicinc.com>
Date: Wed, 1 Jun 2022 16:15:02 +0530
From: Rohit Agarwal <quic_rohiagar@...cinc.com>
To: agross@...nel.org, bjorn.andersson@...aro.org, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, wim@...ux-watchdog.org,
linux@...ck-us.net
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-watchdog@...r.kernel.org,
manivannan.sadhasivam@...aro.org,
Rohit Agarwal <quic_rohiagar@...cinc.com>
Subject: [PATCH 01/11] ARM: dts: qcom: sdx65: Add CPUFreq support
Add CPUFreq support to SDX65 platform using the cpufreq-dt driver.
There is no dedicated hardware block available on this platform to
carry on the CPUFreq duties. Hence, it is accomplished using the CPU
clock and regulators tied together by the operating points table.
Signed-off-by: Rohit Agarwal <quic_rohiagar@...cinc.com>
---
arch/arm/boot/dts/qcom-sdx65.dtsi | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
index a75e9f1..2530c4f 100644
--- a/arch/arm/boot/dts/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
@@ -54,6 +54,35 @@
compatible = "arm,cortex-a7";
reg = <0x0>;
enable-method = "psci";
+ clocks = <&apcs>;
+ power-domains = <&rpmhpd SDX65_CX_AO>;
+ power-domain-names = "rpmhpd";
+ operating-points-v2 = <&cpu_opp_table>;
+ };
+ };
+
+ cpu_opp_table: cpu-opp-table {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp-345600000 {
+ opp-hz = /bits/ 64 <345600000>;
+ required-opps = <&rpmhpd_opp_low_svs>;
+ };
+
+ opp-576000000 {
+ opp-hz = /bits/ 64 <576000000>;
+ required-opps = <&rpmhpd_opp_svs>;
+ };
+
+ opp-1094400000 {
+ opp-hz = /bits/ 64 <1094400000>;
+ required-opps = <&rpmhpd_opp_nom>;
+ };
+
+ opp-1497600000 {
+ opp-hz = /bits/ 64 <1497600000>;
+ required-opps = <&rpmhpd_opp_turbo>;
};
};
--
2.7.4
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