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Message-ID: <mhng-ba83da39-dadf-4d6e-99be-a1b5fdf9b62c@palmer-ri-x1c9>
Date: Wed, 01 Jun 2022 22:58:08 -0700 (PDT)
From: Palmer Dabbelt <palmer@...belt.com>
To: Atish Patra <atishp@...osinc.com>, Will Deacon <will@...nel.org>,
mark.rutland@....com
CC: linux-kernel@...r.kernel.org, Atish Patra <atishp@...osinc.com>,
atishp@...shpatra.org, anup@...infault.org, jszhang@...nel.org,
linux-riscv@...ts.infradead.org,
Paul Walmsley <paul.walmsley@...ive.com>, robh+dt@...nel.org
Subject: Re: [PATCH v2 0/3] Miscellaneous fixes for PMU driver
On Thu, 12 May 2022 18:55:19 PDT (-0700), Atish Patra wrote:
> This series fixes issues PMU driver code.
> PATCH 1 & 3 are fixes for rv32 while PATCH 2 fixes a redundant
> user page update issue during counter start.
>
> Changes from v1->v2:
> 1. Add proper compile time rv32 checks.
>
> Atish Patra (3):
> RISC-V: Fix counter restart during overflow for RV32
> RISC-V: Update user page mapping only once during start
> RISC-V: Fix SBI PMU calls for RV32
>
> drivers/perf/riscv_pmu.c | 1 -
> drivers/perf/riscv_pmu_sbi.c | 16 ++++++++++++++++
> 2 files changed, 16 insertions(+), 1 deletion(-)
+Will and Mark.
Will recently took some stuff for drivers/perf/riscv_* into his
for-next/perf tree (which I didn't even know about until then, oops),
but the previous stuff I took through the RISC-V tree. Always happy to
get stuff out of my tree, just LMK what you want me to do here.
I did some minor cleanups to the commit text and put them over at
palmer/riscv-pmu_fixes, it's all passing my tests. These generally look
fine to me and they're all stable backports, so no big rush on the merge
window (which I still have stuff for).
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