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Message-ID: <6d432025e3f7e96a26d07ad0c779234a246ef4fe.camel@mediatek.com>
Date:   Thu, 2 Jun 2022 14:22:28 +0800
From:   Tinghan Shen <tinghan.shen@...iatek.com>
To:     Rex-BC Chen <rex-bc.chen@...iatek.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Matthias Brugger <matthias.bgg@...il.com>
CC:     <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-mediatek@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>,
        <Project_Global_Chrome_Upstream_Group@...iatek.com>
Subject: Re: [PATCH v1] dt-bindings: dsp: mediatek: add mt8186 dsp document

Hi Rex,

On Fri, 2022-04-22 at 15:59 +0800, Rex-BC Chen wrote:
> On Fri, 2022-04-22 at 15:15 +0800, Tinghan Shen wrote:
> > This patch adds mt8186 dsp document. The dsp is used for Sound Open
> > Firmware driver node. It includes registers, clocks, memory regions,
> > and mailbox for dsp.
> > 
> > Signed-off-by: Tinghan Shen <tinghan.shen@...iatek.com>
> > ---
> > 
> > This patch depends on MT8186 clock bindings.
> > 
> 
> https://lore.kernel.org/all/20220409132251.31725-2-chun-jie.chen@mediatek.com/
> > 
> > ---
> >  .../bindings/dsp/mediatek,mt8186-dsp.yaml     | 93
> > +++++++++++++++++++
> >  1 file changed, 93 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml
> > 
> > diff --git a/Documentation/devicetree/bindings/dsp/mediatek,mt8186-
> > dsp.yaml b/Documentation/devicetree/bindings/dsp/mediatek,mt8186-
> > dsp.yaml
> > new file mode 100644
> > index 000000000000..00a79e880895
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/dsp/mediatek,mt8186-dsp.yaml
> > @@ -0,0 +1,93 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/dsp/mediatek,mt8186-dsp.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Mediatek mt8186 DSP core
> 
> Hello Tinghan,
> 
> Please use MediaTek.

Ok. I'll update it at next version.


Thanks,
TingHan


> Thanks.
> 
> BRs,
> Rex
> 
> > +
> > +maintainers:
> > +  - Tinghan Shen <tinghan.shen@...iatek.com>
> > +
> > +description: |
> > +  MediaTek mt8186 SoC contains a DSP core used for
> > +  advanced pre- and post- audio processing.
> > +
> > +properties:
> > +  compatible:
> > +    const: mediatek,mt8186-dsp
> > +
> > +  reg:
> > +    items:
> > +      - description: Address and size of the DSP config registers
> > +      - description: Address and size of the DSP SRAM
> > +      - description: Address and size of the DSP secure registers
> > +      - description: Address and size of the DSP bus registers
> > +
> > +  reg-names:
> > +    items:
> > +      - const: cfg
> > +      - const: sram
> > +      - const: sec
> > +      - const: bus
> > +
> > +  clocks:
> > +    items:
> > +      - description: mux for audio dsp clock
> > +      - description: mux for audio dsp local bus
> > +
> > +  clock-names:
> > +    items:
> > +      - const: audiodsp_sel
> > +      - const: adsp_bus_sel
> > +
> > +  power-domains:
> > +    maxItems: 1
> > +
> > +  mboxes:
> > +    items:
> > +      - description: ipc reply between host and audio DSP.
> > +      - description: ipc request between host and audio DSP.
> > +
> > +  mbox-names:
> > +    items:
> > +      - const: mbox0
> > +      - const: mbox1
> > +
> > +  memory-region:
> > +    items:
> > +      - description: dma buffer between host and DSP.
> > +      - description: DSP system memory.
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - reg-names
> > +  - clocks
> > +  - clock-names
> > +  - power-domains
> > +  - mbox-names
> > +  - mboxes
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +    #include <dt-bindings/interrupt-controller/irq.h>
> > +    #include <dt-bindings/clock/mt8186-clk.h>
> > +    dsp@...80000 {
> > +        compatible = "mediatek,mt8186-dsp";
> > +        reg = <0x10680000 0x2000>,
> > +              <0x10800000 0x100000>,
> > +              <0x1068b000 0x100>,
> > +              <0x1068f000 0x1000>;
> > +        reg-names = "cfg", "sram", "sec", "bus";
> > +        clocks = <&topckgen CLK_TOP_AUDIODSP>,
> > +                 <&topckgen CLK_TOP_ADSP_BUS>;
> > +        clock-names = "audiodsp_sel",
> > +                      "adsp_bus_sel";
> > +        power-domains = <&spm 6>;
> > +        mbox-names = "mbox0", "mbox1";
> > +        mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>;
> > +    };
> 
> 

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