[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-Id: <20220602143816.3432427-1-wen.ping.teh@intel.com>
Date: Thu, 2 Jun 2022 22:38:16 +0800
From: wen.ping.teh@...el.com
To: robin.murphy@....com
Cc: catalin.marinas@....com, devicetree@...r.kernel.org,
dinguyen@...nel.org, krzysztof.kozlowski+dt@...aro.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
robh+dt@...nel.org, wen.ping.teh@...el.com, will@...nel.org
Subject: Re: [PATCH] arm64: dts: Add support for Stratix 10 Software Virtual Platform
From: wen.ping.teh@...el.com
Hello Robin,
>> +/ {
>> + model = "SOCFPGA Stratix 10 SWVP";
>> + compatible = "arm,foundation-aarch64", "arm,vexpress";
>
>This is definitely not compatible with any Arm Versatile Express
>platform. It doesn't even have RAM in the same place, for starters.
Will change to the correct platform i.e. "altr,socfpga-stratix10"
>> + l2-cache@...ff000 {
>> + compatible = "arm,pl310-cache";
>
>Yikes, I hope not!
>
>I didn't think AArch64 even allows outer caches that don't honour CPU
>cache maintenance by VA? Either way I can't imagine we'd ever accept
>PL310 support in mainline, so even if your model does actually have this
>for some inexplicable reason, I don't think there's any point exposing
>it in the DT.
Will remove outer cache.
All fixes have been done in v2 patch.
https://lore.kernel.org/linux-arm-kernel/20220602141151.3431212-1-wen.ping.teh@intel.com/T/#u
Thanks,
Wen Ping
Powered by blists - more mailing lists