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Date:   Thu, 2 Jun 2022 23:55:47 +0200
From:   Ondřej Jirman <megous@...ous.com>
To:     Roman Stratiienko <r.stratiienko@...il.com>
Cc:     mripard@...nel.org, wens@...e.org, jernej.skrabec@...il.com,
        airlied@...ux.ie, daniel@...ll.ch, samuel@...lland.org,
        dri-devel@...ts.freedesktop.org,
        linux-arm-kernel@...ts.infradead.org, linux-sunxi@...ts.linux.dev,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] drm/sun4i: sun8i: Add the ability to keep scaler enabled
 for VI layer

Hi Roman,

On Thu, Jun 02, 2022 at 06:01:18PM +0000, Roman Stratiienko wrote:
> According to DE2.0/DE3.0 manual VI scaler enable register is double
> buffered, but de facto it doesn't, or the hardware has the shadow
> register latching issues which causes single-frame picture corruption
> after changing the state of scaler enable register.
> 
> Allow the user to keep the scaler always enabled, preventing the UI
> glitches on the transition from scaled to unscaled state.
> 
> NOTE:
> UI layer scaler has more registers with double-buffering issue and can't
> be workarounded in the same manner.
> 
> You may find a python test and a demo video for this issue at [1]

Isn't this an issue with kernel driver not waiting for DE2 FINISH IRQ, but
for VBLANK IRQ from TCON instead, before allowing to write new set of register
values?

https://megous.com/dl/tmp/4fe35b3fc72ee7de.png

I haven't checked if FINISH flag is set at time of VBLANK interrupt, so maybe
this is not the issue.

regards,
	o.

> [1]: https://github.com/GloDroid/glodroid_tests/issues/4
> Signed-off-by: Roman Stratiienko <r.stratiienko@...il.com>
> ---
>  drivers/gpu/drm/sun4i/sun8i_mixer.c    | 12 ++++++++++++
>  drivers/gpu/drm/sun4i/sun8i_vi_layer.c |  4 +++-
>  2 files changed, 15 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c
> index 71ab0a00b4de..15cad0330f66 100644
> --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c
> +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c
> @@ -27,6 +27,18 @@
>  #include "sun8i_vi_layer.h"
>  #include "sunxi_engine.h"
>  
> +/* According to DE2.0/DE3.0 manual VI scaler enable register is double
> + * buffered, but de facto it doesn't, or the hardware has the shadow
> + * register latching issues which causes single-frame picture corruption
> + * after changing the state of scaler enable register.
> + * Allow the user to keep the scaler always enabled, preventing the UI
> + * glitches on the transition from scaled to unscaled state.
> + */
> +int sun8i_vi_keep_scaler_enabled;
> +MODULE_PARM_DESC(keep_vi_scaler_enabled,
> +		 "Keep VI scaler enabled (1 = enabled, 0 = disabled (default))");
> +module_param_named(keep_vi_scaler_enabled, sun8i_vi_keep_scaler_enabled, int, 0644);
> +
>  struct de2_fmt_info {
>  	u32	drm_fmt;
>  	u32	de2_fmt;
> diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
> index 662ba1018cc4..f005ab883503 100644
> --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
> +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c
> @@ -17,6 +17,8 @@
>  #include "sun8i_vi_layer.h"
>  #include "sun8i_vi_scaler.h"
>  
> +extern int sun8i_vi_keep_scaler_enabled;
> +
>  static void sun8i_vi_layer_enable(struct sun8i_mixer *mixer, int channel,
>  				  int overlay, bool enable, unsigned int zpos)
>  {
> @@ -149,7 +151,7 @@ static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel,
>  	 */
>  	subsampled = format->hsub > 1 || format->vsub > 1;
>  
> -	if (insize != outsize || subsampled || hphase || vphase) {
> +	if (insize != outsize || subsampled || hphase || vphase || sun8i_vi_keep_scaler_enabled) {
>  		unsigned int scanline, required;
>  		struct drm_display_mode *mode;
>  		u32 hscale, vscale, fps;
> -- 
> 2.30.2
> 

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