linux-kernel - Re: [PATCH V15 10/24] LoongArch: Add other common headers

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Message-ID: <CAK8P3a0iASLd768imA8pG32Cc2RsqG8-ZyN+Obcg+PksVj1FJg@mail.gmail.com>
Date:   Fri, 3 Jun 2022 15:55:27 +0200
From:   Arnd Bergmann <arnd@...db.de>
To:     "Jason A. Donenfeld" <Jason@...c4.com>
Cc:     Huacai Chen <chenhuacai@...ngson.cn>,
        Arnd Bergmann <arnd@...db.de>,
        Andy Lutomirski <luto@...nel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Peter Zijlstra <peterz@...radead.org>,
        Andrew Morton <akpm@...ux-foundation.org>,
        David Airlie <airlied@...ux.ie>,
        Jonathan Corbet <corbet@....net>,
        Linus Torvalds <torvalds@...ux-foundation.org>,
        linux-arch <linux-arch@...r.kernel.org>,
        "open list:DOCUMENTATION" <linux-doc@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Xuefeng Li <lixuefeng@...ngson.cn>,
        Yanteng Si <siyanteng@...ngson.cn>,
        Huacai Chen <chenhuacai@...il.com>,
        Guo Ren <guoren@...nel.org>, Xuerui Wang <kernel@...0n.name>,
        Jiaxun Yang <jiaxun.yang@...goat.com>,
        Stephen Rothwell <sfr@...b.auug.org.au>,
        WANG Xuerui <git@...0n.name>
Subject: Re: [PATCH V15 10/24] LoongArch: Add other common headers

On Fri, Jun 3, 2022 at 3:40 PM Jason A. Donenfeld <Jason@...c4.com> wrote:
> On Fri, Jun 03, 2022 at 03:20:39PM +0800, Huacai Chen wrote:
> > diff --git a/arch/loongarch/include/asm/timex.h b/arch/loongarch/include/asm/timex.h
>
> "Currently only used on SMP for scheduling" isn't quite correct. It's
> also used by random_get_entropy(). And anything else that uses
> get_cycles() for, e.g., benchmarking, might use it too.
>
> You wrote also, "we know that all SMP capable CPUs have cycle counters",
> so if I gather from this statement that some !SMP CPUs don't have a
> cycle counter, though some do. If that's a correct supposition, then
> you may need to rewrite this file to be something like:

The file is based on the mips version that deals with a variety of
implementations
and has the same comment.

I assume the loongarch chips all behave the same way here, and won't need
a special case for non-SMP.

       Arnd