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Message-Id: <20220603173814.409505858@linuxfoundation.org>
Date: Fri, 3 Jun 2022 19:39:28 +0200
From: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To: linux-kernel@...r.kernel.org
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
stable@...r.kernel.org,
Jeremi Piotrowski <jpiotrowski@...ux.microsoft.com>,
Dusty Mabe <dustymabe@...hat.com>,
Salvatore Bonaccorso <carnil@...ian.org>,
Thomas Gleixner <tglx@...utronix.de>,
Noah Meyerhans <noahm@...ian.org>,
Noah Meyerhans <nmeyerha@...zon.com>
Subject: [PATCH 4.14 01/23] x86/pci/xen: Disable PCI/MSI[-X] masking for XEN_HVM guests
From: Thomas Gleixner <tglx@...utronix.de>
commit 7e0815b3e09986d2fe651199363e135b9358132a upstream.
When a XEN_HVM guest uses the XEN PIRQ/Eventchannel mechanism, then
PCI/MSI[-X] masking is solely controlled by the hypervisor, but contrary to
XEN_PV guests this does not disable PCI/MSI[-X] masking in the PCI/MSI
layer.
This can lead to a situation where the PCI/MSI layer masks an MSI[-X]
interrupt and the hypervisor grants the write despite the fact that it
already requested the interrupt. As a consequence interrupt delivery on the
affected device is not happening ever.
Set pci_msi_ignore_mask to prevent that like it's done for XEN_PV guests
already.
Fixes: 809f9267bbab ("xen: map MSIs into pirqs")
Reported-by: Jeremi Piotrowski <jpiotrowski@...ux.microsoft.com>
Reported-by: Dusty Mabe <dustymabe@...hat.com>
Reported-by: Salvatore Bonaccorso <carnil@...ian.org>
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
Tested-by: Noah Meyerhans <noahm@...ian.org>
Cc: stable@...r.kernel.org
Link: https://lore.kernel.org/r/87tuaduxj5.ffs@tglx
[nmeyerha@...zon.com: backported to 4.14]
Signed-off-by: Noah Meyerhans <nmeyerha@...zon.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
---
arch/x86/pci/xen.c | 5 +++++
1 file changed, 5 insertions(+)
--- a/arch/x86/pci/xen.c
+++ b/arch/x86/pci/xen.c
@@ -442,6 +442,11 @@ void __init xen_msi_init(void)
x86_msi.setup_msi_irqs = xen_hvm_setup_msi_irqs;
x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
+ /*
+ * With XEN PIRQ/Eventchannels in use PCI/MSI[-X] masking is solely
+ * controlled by the hypervisor.
+ */
+ pci_msi_ignore_mask = 1;
}
#endif
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