linux-kernel - Re: [PATCH v2 04/12] irqchip: mips-gic: Support multi-cluster in gic_with_each_online

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Message-ID: <87tu8y3pg3.wl-maz@kernel.org>
Date:   Mon, 06 Jun 2022 14:13:16 +0100
From:   Marc Zyngier <maz@...nel.org>
To:     Dragan Mladjenovic <Dragan.Mladjenovic@...mia.com>
Cc:     Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
        Chao-ying Fu <cfu@...ecomp.com>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        Geert Uytterhoeven <geert@...ux-m68k.org>,
        Greg Ungerer <gerg@...nel.org>,
        Hauke Mehrtens <hauke@...ke-m.de>,
        Ilya Lipnitskiy <ilya.lipnitskiy@...il.com>,
        Jiaxun Yang <jiaxun.yang@...goat.com>,
        linux-kernel@...r.kernel.org, linux-mips@...r.kernel.org,
        Paul Burton <paulburton@...nel.org>,
        Peter Zijlstra <peterz@...radead.org>,
        Serge Semin <fancer.lancer@...il.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Tiezhu Yang <yangtiezhu@...ngson.cn>,
        Dragan Mladjenovic <dragan.mladjenovic@...mia.com>
Subject: Re: [PATCH v2 04/12] irqchip: mips-gic: Support multi-cluster in gic_with_each_online_cpu()

On Wed, 25 May 2022 13:10:22 +0100,
Dragan Mladjenovic <Dragan.Mladjenovic@...mia.com> wrote:
> 
> From: Paul Burton <paulburton@...nel.org>
> 
> Introduce support for multi-cluster GIC register access in
> __gic_with_next_online_cpu(), and therefore in its user
> gic_with_each_online_cpu(). We access registers in remote clusters using
> the CM's GCR_CL_REDIRECT register, and so here we delegate to
> mips_cm_lock_other() in order to configure this access.
> 
> With this done, users of gic_with_each_online_cpu() gain support for
> multi-cluster with no further changes.
> 
> Signed-off-by: Paul Burton <paulburton@...nel.org>
> Signed-off-by: Chao-ying Fu <cfu@...ecomp.com>
> Signed-off-by: Dragan Mladjenovic <dragan.mladjenovic@...mia.com>
> 
> diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
> index 4872bebe24cf..89a3c6d04e09 100644
> --- a/drivers/irqchip/irq-mips-gic.c
> +++ b/drivers/irqchip/irq-mips-gic.c
> @@ -69,6 +69,20 @@ static int __gic_with_next_online_cpu(int prev)
>  {
>  	unsigned int cpu;
>  
> +	/*
> +	 * Unlock access to the previous CPU's GIC local register block.
> +	 *
> +	 * Delegate to the CM locking code in the multi-cluster case, since
> +	 * other clusters can only be accessed using GCR_CL_REDIRECT.
> +	 *
> +	 * In the single cluster case we don't need to do anything; the caller
> +	 * is responsible for maintaining gic_lock & nothing should be
> +	 * expecting any particular value of GIC_VL_OTHER so we can leave it
> +	 * as-is.
> +	 */
> +	if ((prev != -1) && mips_cps_multicluster_cpus())
> +		mips_cm_unlock_other();

Huh. It now strikes me that if you exit the gic_with_next_online_cpu()
early (with a 'break;', for example), the state machine breaks as you
won't have performed the unlock...

This definitely needs some documenting, at the very least.

	M.

-- 
Without deviation from the norm, progress is not possible.