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Message-ID: <f791f46c6307a18818574cb7fb8653bcc84aa9ad.camel@mediatek.com>
Date: Tue, 7 Jun 2022 15:47:07 +0800
From: CK Hu <ck.hu@...iatek.com>
To: Rex-BC Chen <rex-bc.chen@...iatek.com>,
Guillaume Ranquet <granquet@...libre.com>,
Chun-Kuang Hu <chunkuang.hu@...nel.org>,
"Philipp Zabel" <p.zabel@...gutronix.de>,
David Airlie <airlied@...ux.ie>,
"Daniel Vetter" <daniel@...ll.ch>,
Rob Herring <robh+dt@...nel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@...aro.org>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>,
Thomas Zimmermann <tzimmermann@...e.de>,
Matthias Brugger <matthias.bgg@...il.com>,
Chunfeng Yun <chunfeng.yun@...iatek.com>,
"Kishon Vijay Abraham I" <kishon@...com>,
Vinod Koul <vkoul@...nel.org>, "Helge Deller" <deller@....de>,
Jitao shi <jitao.shi@...iatek.com>
CC: Markus Schneider-Pargmann <msp@...libre.com>,
<dri-devel@...ts.freedesktop.org>,
<linux-mediatek@...ts.infradead.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-phy@...ts.infradead.org>, <linux-fbdev@...r.kernel.org>
Subject: Re: [PATCH v10 18/21] drm/mediatek: Add mt8195 Embedded DisplayPort
driver
Hi, Rex:
On Mon, 2022-05-23 at 12:47 +0200, Guillaume Ranquet wrote:
> From: Markus Schneider-Pargmann <msp@...libre.com>
>
> This patch adds a DisplayPort driver for the Mediatek mt8195 SoC.
>
> It supports the mt8195, the embedded DisplayPort units. It offers
> DisplayPort 1.4 with up to 4 lanes.
>
> The driver creates a child device for the phy. The child device will
> never exist without the parent being active. As they are sharing a
> register range, the parent passes a regmap pointer to the child so
> that
> both can work with the same register range. The phy driver sets
> device
> data that is read by the parent to get the phy device that can be
> used
> to control the phy properties.
>
> This driver is based on an initial version by
> Jason-JH.Lin <jason-jh.lin@...iatek.com>.
>
> Signed-off-by: Markus Schneider-Pargmann <msp@...libre.com>
> Signed-off-by: Guillaume Ranquet <granquet@...libre.com>
> ---
[snip]
> +
> +static int mtk_dp_hpd_sink_event(struct mtk_dp *mtk_dp)
> +{
> + ssize_t ret;
> + u8 sink_count;
> + bool locked;
> + u8 link_status[DP_LINK_STATUS_SIZE] = {};
> + u32 sink_count_reg = DP_SINK_COUNT_ESI;
> + u32 link_status_reg = DP_LANE0_1_STATUS;
> +
> + ret = drm_dp_dpcd_readb(&mtk_dp->aux, sink_count_reg,
> &sink_count);
> + if (ret < 0) {
> + drm_err(mtk_dp->drm_dev, "Read sink count failed:
> %ld\n", ret);
> + return ret;
> + }
> +
> + ret = drm_dp_dpcd_read(&mtk_dp->aux, link_status_reg,
> link_status,
> + sizeof(link_status));
> + if (!ret) {
> + drm_err(mtk_dp->drm_dev, "Read link status failed:
> %ld\n",
> + ret);
> + return ret;
> + }
> +
> + locked = drm_dp_channel_eq_ok(link_status,
> + mtk_dp->train_info.lane_count);
> + if (!locked && mtk_dp->train_state >
> MTK_DP_TRAIN_STATE_TRAINING_PRE)
Before enter this function, mtk_dp->train_state is set to
MTK_DP_TRAIN_STATE_STARTUP, so this never happen, drop this.
> + mtk_dp->train_state = MTK_DP_TRAIN_STATE_TRAINING_PRE;
> +
> + if (link_status[1] & DP_REMOTE_CONTROL_COMMAND_PENDING)
> + drm_dp_dpcd_writeb(&mtk_dp->aux,
> DP_DEVICE_SERVICE_IRQ_VECTOR,
> + DP_REMOTE_CONTROL_COMMAND_PENDING);
> +
> + if (DP_GET_SINK_COUNT(sink_count) &&
> + (link_status[2] & DP_DOWNSTREAM_PORT_STATUS_CHANGED)) {
> + mtk_dp->train_info.check_cap_count = 0;
> + mtk_dp->train_state = MTK_DP_TRAIN_STATE_CHECKEDID;
Why change state from MTK_DP_TRAIN_STATE_STARTUP to
MTK_DP_TRAIN_STATE_CHECKEDID? In mtk_dp_train_handler(),
mtk_dp_parse_capabilities() is true then change to
MTK_DP_TRAIN_STATE_CHECKEDID. Give a reason why these two are
different.
Regards,
CK
> + msleep(20);
> + }
> +
> + return 0;
> +}
> +
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