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Message-Id: <20220607120530.2447112-7-tarumizu.kohei@fujitsu.com>
Date: Tue, 7 Jun 2022 21:05:30 +0900
From: Kohei Tarumizu <tarumizu.kohei@...itsu.com>
To: catalin.marinas@....com, will@...nel.org, tglx@...utronix.de,
mingo@...hat.com, bp@...en8.de, dave.hansen@...ux.intel.com,
x86@...nel.org, hpa@...or.com, rafael@...nel.org, lenb@...nel.org,
gregkh@...uxfoundation.org, mchehab+huawei@...nel.org,
eugenis@...gle.com, tony.luck@...el.com, pcc@...gle.com,
peterz@...radead.org, marcos@...a.pet, marcan@...can.st,
linus.walleij@...aro.org, nicolas.ferre@...rochip.com,
conor.dooley@...rochip.com, arnd@...db.de, ast@...nel.org,
peter.chen@...nel.org, kuba@...nel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-acpi@...r.kernel.org
Cc: tarumizu.kohei@...itsu.com
Subject: [PATCH v5 6/6] docs: ABI: Add sysfs documentation interface of hardware prefetch control driver
This describes the sysfs interface implemented by the hardware prefetch
control driver.
Signed-off-by: Kohei Tarumizu <tarumizu.kohei@...itsu.com>
---
.../ABI/testing/sysfs-devices-system-cpu | 98 +++++++++++++++++++
1 file changed, 98 insertions(+)
diff --git a/Documentation/ABI/testing/sysfs-devices-system-cpu b/Documentation/ABI/testing/sysfs-devices-system-cpu
index 2ad01cad7f1c..0da4c1bac51e 100644
--- a/Documentation/ABI/testing/sysfs-devices-system-cpu
+++ b/Documentation/ABI/testing/sysfs-devices-system-cpu
@@ -688,3 +688,101 @@ Description:
(RO) the list of CPUs that are isolated and don't
participate in load balancing. These CPUs are set by
boot parameter "isolcpus=".
+
+What: /sys/devices/system/cpu/cpu*/cache/index*/prefetch_control/hardware_prefetcher_enable
+ /sys/devices/system/cpu/cpu*/cache/index*/prefetch_control/ip_prefetcher_enable
+ /sys/devices/system/cpu/cpu*/cache/index*/prefetch_control/adjacent_cache_line_prefetcher_enable
+Date: March 2022
+Contact: Linux kernel mailing list <linux-kernel@...r.kernel.org>
+Description: Parameters for some Intel CPU's hardware prefetch control
+
+ This sysfs interface provides Hardware Prefetch control
+ attribute for some Intel processors. Attributes are only
+ present if the particular cache implements the relevant
+ prefetcher controls.
+
+ *_prefetcher_enable:
+ (RW) control this prefetcher's enablement state.
+ Read returns current status:
+ 0: this prefetcher is disabled
+ 1: this prefetcher is enabled
+
+ - Attribute mapping
+
+ Some Intel processors have MSR 0x1a4. This register has several
+ specifications depending on the model. This interface provides
+ a one-to-one attribute file to control all the tunable
+ parameters the CPU provides of the following.
+
+ - "* Hardware Prefetcher Disable (R/W)"
+ corresponds to the "hardware_prefetcher_enable"
+
+ - "* Adjacent Cache Line Prefetcher Disable (R/W)"
+ corresponds to the "adjacent_cache_line_prefetcher_enable"
+
+ - "* IP Prefetcher Disable (R/W)"
+ corresponds to the "ip_prefetcher_enable"
+
+What: /sys/devices/system/cpu/cpu*/cache/index*/prefetch_control/stream_detect_prefetcher_enable
+ /sys/devices/system/cpu/cpu*/cache/index*/prefetch_control/stream_detect_prefetcher_strength
+ /sys/devices/system/cpu/cpu*/cache/index*/prefetch_control/stream_detect_prefetcher_strength_available
+ /sys/devices/system/cpu/cpu*/cache/index*/prefetch_control/stream_detect_prefetcher_dist
+Date: March 2022
+Contact: Linux kernel mailing list <linux-kernel@...r.kernel.org>
+Description: Parameters for A64FX's hardware prefetch control
+
+ This sysfs interface provides Hardware Prefetch control
+ attribute for the processor A64FX. Attributes are only
+ present if the particular cache implements the relevant
+ prefetcher controls.
+
+ stream_detect_prefetcher_enable:
+ (RW) control the prefetcher's enablement state.
+ Read returns current status:
+ 0: this prefetcher is disabled
+ 1: this prefetcher is enabled
+
+ stream_detect_prefetcher_strength:
+ (RW) control the prefetcher operation's strongness state.
+ Read returns current status:
+ weak: prefetch operation is weak
+ strong: prefetch operation is strong
+
+ Strong prefetch operation is surely executed, if there is
+ no corresponding data in cache.
+ Weak prefetch operation allows the hardware not to execute
+ operation depending on hardware state.
+
+
+ stream_detect_prefetcher_strength_available:
+ (RO) displays a space separated list of available strongness
+ state.
+
+ stream_detect_prefetcher_dist:
+ (RW) control the prefetcher distance value.
+ Read return current prefetcher distance value in bytes
+ or the string "auto".
+
+ Write either a value in byte or the string "auto" to this
+ parameter. If you write a value less than multiples of a
+ specific value, it is rounded up.
+
+ The string "auto" have a special meaning. This means that
+ instead of setting dist to a user-specified value, it
+ operates using hardware-specific values.
+
+ - Attribute mapping
+
+ The processor A64FX has register IMP_PF_STREAM_DETECT_CTRL_EL0
+ for Hardware Prefetch Control. This attribute maps each
+ specification to the following.
+
+ - "L*PF_DIS": enablement of hardware prefetcher
+ corresponds to the "stream_detect_prefetcher_enable"
+
+ - "L*W": strongness of hardware prefetcher
+ corresponds to "stream_detect_prefetcher_strength"
+ and "stream_detect_prefetcher_strength_available"
+
+ - "L*_DIST": distance of hardware prefetcher
+ corresponds to the "stream_detect_prefetcher_dist"
--
2.27.0
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