[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <20220607125633.GA1787169@roeck-us.net>
Date: Tue, 7 Jun 2022 05:56:33 -0700
From: Guenter Roeck <linux@...ck-us.net>
To: Mario Limonciello <mario.limonciello@....com>
Cc: Clemens Ladisch <clemens@...isch.de>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
Dave Hansen <dave.hansen@...ux.intel.com>,
"maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" <x86@...nel.org>,
"H. Peter Anvin" <hpa@...or.com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Yazen Ghannam <yazen.ghannam@....com>,
Krzysztof WilczyĆski <kw@...ux.com>,
"open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)"
<linux-kernel@...r.kernel.org>,
"open list:PCI SUBSYSTEM" <linux-pci@...r.kernel.org>,
linux-hwmon@...r.kernel.org,
Gabriel Craciunescu <nix.or.die@...glemail.com>,
babu.moger@....com
Subject: Re: [PATCH 1/2] x86/amd_nb: Add AMD Family 19h A0-AF IDs
On Wed, Jun 01, 2022 at 12:21:18PM -0500, Mario Limonciello wrote:
> commit 4fb0abfee424 ("x86/amd_nb: Add AMD Family 19h Models (10h-1Fh)
> and (A0h-AFh) PCI IDs") had claimed to add the IDs for models A0h-AFh,
> but it appears to only have added the models 10h-1Fh.
>
> Add the actual IDs for A0-AF which are needed for SMN communication to
> work properly in amd_nb.
>
> Fixes: 4fb0abfee424 ("x86/amd_nb: Add AMD Family 19h Models (10h-1Fh) and (A0h-AFh) PCI IDs")
> Signed-off-by: Mario Limonciello <mario.limonciello@....com>
> Acked-by: Bjorn Helgaas <bhelgaas@...gle.com>
> ---
> arch/x86/kernel/amd_nb.c | 5 +++++
I'll need an Ack from a x86 maintainer to apply this series,
or it needs to be applied through x86. I sent an Ack for patch 2/2,
so the latter would be fine with me.
Thanks,
Guenter
> include/linux/pci_ids.h | 1 +
> 2 files changed, 6 insertions(+)
>
> diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
> index 190e0f763375..cc8c7cfa9068 100644
> --- a/arch/x86/kernel/amd_nb.c
> +++ b/arch/x86/kernel/amd_nb.c
> @@ -25,11 +25,13 @@
> #define PCI_DEVICE_ID_AMD_17H_M30H_DF_F4 0x1494
> #define PCI_DEVICE_ID_AMD_17H_M60H_DF_F4 0x144c
> #define PCI_DEVICE_ID_AMD_17H_M70H_DF_F4 0x1444
> +#define PCI_DEVICE_ID_AMD_19H_MA0H_ROOT 0x14b5
> #define PCI_DEVICE_ID_AMD_19H_DF_F4 0x1654
> #define PCI_DEVICE_ID_AMD_19H_M10H_DF_F4 0x14b1
> #define PCI_DEVICE_ID_AMD_19H_M40H_ROOT 0x14b5
> #define PCI_DEVICE_ID_AMD_19H_M40H_DF_F4 0x167d
> #define PCI_DEVICE_ID_AMD_19H_M50H_DF_F4 0x166e
> +#define PCI_DEVICE_ID_AMD_19H_MA0H_DF_F4 0x1728
>
> /* Protect the PCI config register pairs used for SMN. */
> static DEFINE_MUTEX(smn_mutex);
> @@ -43,6 +45,7 @@ static const struct pci_device_id amd_root_ids[] = {
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M60H_ROOT) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M10H_ROOT) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M40H_ROOT) },
> + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_MA0H_ROOT) },
> {}
> };
>
> @@ -67,6 +70,7 @@ static const struct pci_device_id amd_nb_misc_ids[] = {
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M10H_DF_F3) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M40H_DF_F3) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M50H_DF_F3) },
> + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_MA0H_DF_F3) },
> {}
> };
>
> @@ -85,6 +89,7 @@ static const struct pci_device_id amd_nb_link_ids[] = {
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M10H_DF_F4) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M40H_DF_F4) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M50H_DF_F4) },
> + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_MA0H_DF_F4) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F4) },
> {}
> };
> diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
> index 0178823ce8c2..05b4c67a8a2a 100644
> --- a/include/linux/pci_ids.h
> +++ b/include/linux/pci_ids.h
> @@ -560,6 +560,7 @@
> #define PCI_DEVICE_ID_AMD_19H_M10H_DF_F3 0x14b0
> #define PCI_DEVICE_ID_AMD_19H_M40H_DF_F3 0x167c
> #define PCI_DEVICE_ID_AMD_19H_M50H_DF_F3 0x166d
> +#define PCI_DEVICE_ID_AMD_19H_MA0H_DF_F3 0x1727
> #define PCI_DEVICE_ID_AMD_CNB17H_F3 0x1703
> #define PCI_DEVICE_ID_AMD_LANCE 0x2000
> #define PCI_DEVICE_ID_AMD_LANCE_HOME 0x2001
Powered by blists - more mailing lists