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Message-ID: <Yp9PdZn2Xu/oqiA8@sirena.org.uk>
Date: Tue, 7 Jun 2022 14:15:33 +0100
From: Mark Brown <broonie@...nel.org>
To: Tianfei Zhang <tianfei.zhang@...el.com>
Cc: gregkh@...uxfoundation.org, rafael@...nel.org,
linux-kernel@...r.kernel.org, hao.wu@...el.com, trix@...hat.com,
yilun.xu@...el.com, russell.h.weight@...el.com,
Matthew Gerlach <matthew.gerlach@...ux.intel.com>
Subject: Re: [PATCH v1] regmap: add generic indirect regmap support
On Mon, Jun 06, 2022 at 09:37:55PM -0400, Tianfei Zhang wrote:
> From: Matthew Gerlach <matthew.gerlach@...ux.intel.com>
>
> This patch adds support for regmap APIs that are intended to be used by
> the drivers of some devices which support generic indirect register access,
> for example PMCI (Platform Management Control Interface) device, HSSI
> (High Speed Serial Interface) device in FPGA.
What is "generic indirect register access"? I'm not clear what this is
intended to support...
> +static int indirect_bus_clr_cmd(struct indirect_ctx *ctx)
> +{
> + unsigned int cmd;
> + int ret;
> +
> + writel(0, ctx->base + INDIRECT_CMD_OFF);
> + ret = readl_poll_timeout((ctx->base + INDIRECT_CMD_OFF), cmd,
> + (!cmd), INDIRECT_INT_US, INDIRECT_TIMEOUT_US);
> + if (ret)
> + dev_err(ctx->dev, "%s timed out on clearing cmd 0x%xn", __func__, cmd);
...and this doesn't look particularly generic, it looks like it's for
some particular controller/bridge?
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