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Message-ID: <6dcb95f2f91d91fc8fd87a86ba988eee0168df19.camel@mediatek.com>
Date: Tue, 7 Jun 2022 10:54:27 +0800
From: Rex-BC Chen <rex-bc.chen@...iatek.com>
To: CK Hu <ck.hu@...iatek.com>,
Guillaume Ranquet <granquet@...libre.com>,
Chun-Kuang Hu <chunkuang.hu@...nel.org>,
Philipp Zabel <p.zabel@...gutronix.de>,
David Airlie <airlied@...ux.ie>,
Daniel Vetter <daniel@...ll.ch>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>,
Thomas Zimmermann <tzimmermann@...e.de>,
Matthias Brugger <matthias.bgg@...il.com>,
Chunfeng Yun <chunfeng.yun@...iatek.com>,
"Kishon Vijay Abraham I" <kishon@...com>,
Vinod Koul <vkoul@...nel.org>, "Helge Deller" <deller@....de>,
Jitao shi <jitao.shi@...iatek.com>
CC: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>,
<dri-devel@...ts.freedesktop.org>,
<linux-mediatek@...ts.infradead.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-phy@...ts.infradead.org>, <linux-fbdev@...r.kernel.org>
Subject: Re: [PATCH v10 07/21] drm/mediatek: dpi: implement a CK/DE pol
toggle in SoC config
On Mon, 2022-05-30 at 15:44 +0800, CK Hu wrote:
> Hi, Guillaume:
>
> On Mon, 2022-05-23 at 12:47 +0200, Guillaume Ranquet wrote:
> > Adds a bit of flexibility to support SoCs without CK/DE pol support
>
> It seems that DP_INTF has no CK/DE pol function. If so, could you
> explain why DP_INTF has this difference with DPI?
>
> Regards,
> CK
>
Hello CK,
Dp_intf does not support CK/DE polarity because the polarity
information is not used for eDP and DP while dp_intf is only for eDP
and DP.
I will add this in commit message in next version.
BRs,
Bo-Chen
> >
> > Signed-off-by: Guillaume Ranquet <granquet@...libre.com>
> > Reviewed-by: AngeloGioacchino Del Regno <
> > angelogioacchino.delregno@...labora.com>
> > Reviewed-by: Rex-BC Chen <rex-bc.chen@...iatek.com>
> > ---
> > drivers/gpu/drm/mediatek/mtk_dpi.c | 22 +++++++++++++++++-----
> > 1 file changed, 17 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > index 4746eb342567..545a1337cc89 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > @@ -125,6 +125,7 @@ struct mtk_dpi_conf {
> > bool edge_sel_en;
> > const u32 *output_fmts;
> > u32 num_output_fmts;
> > + bool is_ck_de_pol;
> > const struct mtk_dpi_yc_limit *limit;
> > };
> >
> > @@ -211,13 +212,20 @@ static void mtk_dpi_config_pol(struct mtk_dpi
> > *dpi,
> > struct mtk_dpi_polarities *dpi_pol)
> > {
> > unsigned int pol;
> > + unsigned int mask;
> >
> > - pol = (dpi_pol->ck_pol == MTK_DPI_POLARITY_RISING ? 0 : CK_POL)
> > >
> >
> > - (dpi_pol->de_pol == MTK_DPI_POLARITY_RISING ? 0 : DE_POL)
> > >
> >
> > - (dpi_pol->hsync_pol == MTK_DPI_POLARITY_RISING ? 0 :
> > HSYNC_POL) |
> > + mask = HSYNC_POL | VSYNC_POL;
> > + pol = (dpi_pol->hsync_pol == MTK_DPI_POLARITY_RISING ? 0 :
> > HSYNC_POL) |
> > (dpi_pol->vsync_pol == MTK_DPI_POLARITY_RISING ? 0 :
> > VSYNC_POL);
> > - mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, pol,
> > - CK_POL | DE_POL | HSYNC_POL | VSYNC_POL);
> > + if (dpi->conf->is_ck_de_pol) {
> > + mask |= CK_POL | DE_POL;
> > + pol |= (dpi_pol->ck_pol == MTK_DPI_POLARITY_RISING ?
> > + 0 : CK_POL) |
> > + (dpi_pol->de_pol == MTK_DPI_POLARITY_RISING ?
> > + 0 : DE_POL);
> > + }
> > +
> > + mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, pol, mask);
> > }
> >
> > static void mtk_dpi_config_3d(struct mtk_dpi *dpi, bool en_3d)
> > @@ -799,6 +807,7 @@ static const struct mtk_dpi_conf mt8173_conf =
> > {
> > .max_clock_khz = 300000,
> > .output_fmts = mt8173_output_fmts,
> > .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts),
> > + .is_ck_de_pol = true,
> > .limit = &mtk_dpi_limit,
> > };
> >
> > @@ -809,6 +818,7 @@ static const struct mtk_dpi_conf mt2701_conf =
> > {
> > .max_clock_khz = 150000,
> > .output_fmts = mt8173_output_fmts,
> > .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts),
> > + .is_ck_de_pol = true,
> > .limit = &mtk_dpi_limit,
> > };
> >
> > @@ -818,6 +828,7 @@ static const struct mtk_dpi_conf mt8183_conf =
> > {
> > .max_clock_khz = 100000,
> > .output_fmts = mt8183_output_fmts,
> > .num_output_fmts = ARRAY_SIZE(mt8183_output_fmts),
> > + .is_ck_de_pol = true,
> > .limit = &mtk_dpi_limit,
> > };
> >
> > @@ -827,6 +838,7 @@ static const struct mtk_dpi_conf mt8192_conf =
> > {
> > .max_clock_khz = 150000,
> > .output_fmts = mt8173_output_fmts,
> > .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts),
> > + .is_ck_de_pol = true,
> > .limit = &mtk_dpi_limit,
> > };
> >
>
>
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