lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <87pmjkwrq6.fsf@dell.be.48ers.dk>
Date:   Tue, 07 Jun 2022 15:03:29 +0200
From:   Peter Korsgaard <peter@...sgaard.com>
To:     Tanmay Shah <tanmay.shah@...inx.com>
Cc:     <bjorn.andersson@...aro.org>, <mathieu.poirier@...aro.org>,
        <robh+dt@...nel.org>, <krzk+dt@...nel.org>,
        <michal.simek@...inx.com>, <ben.levinsky@...inx.com>,
        <linux-remoteproc@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <openamp-system-reference@...ts.openampproject.org>
Subject: Re: [PATCH v8 6/6] drivers: remoteproc: Add Xilinx r5 remoteproc
 driver

>>>>> "Tanmay" == Tanmay Shah <tanmay.shah@...inx.com> writes:

Hi,

 > This driver enables r5f dual core Real time Processing Unit subsystem
 > available on Xilinx Zynq Ultrascale MPSoC Platform. RPU subsystem
 > (cluster) can be configured in different modes e.g. split mode in which
 > two r5f cores work independent of each other and lock-step mode in which
 > both r5f cores execute same code clock-for-clock and notify if the
 > result is different.

 > The Xilinx r5 Remoteproc Driver boots the RPU cores via calls to the Xilinx
 > Platform Management Unit that handles the R5 configuration, memory access
 > and R5 lifecycle management. The interface to this manager is done in this
 > driver via zynqmp_pm_* function calls.

 > Signed-off-by: Ben Levinsky <ben.levinsky@...inx.com>
 > Signed-off-by: Tanmay Shah <tanmay.shah@...inx.com>

 > + * zynqmp_r5_set_mode - set RPU operation mode
 > + *
 > + * set RPU operation mode
 > + *
 > + * Return: 0 for success, negative value for failure
 > + */
 > +static int zynqmp_r5_set_mode(struct zynqmp_r5_core *r5_core,
 > +			      enum rpu_oper_mode fw_reg_val,
 > +			      enum rpu_tcm_comb tcm_mode)
 > +{

NIT: That is an odd name for the lockstep/split argument. Why do you
need to specify both R5F mode and TCM configuration, isn't the TCM mode
implied by the R5F mode?

-- 
Bye, Peter Korsgaard

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ