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Message-ID: <96f4cf1f-bd1e-ae5b-172b-fea572a32500@infradead.org>
Date: Tue, 7 Jun 2022 07:40:42 -0700
From: Randy Dunlap <rdunlap@...radead.org>
To: Kohei Tarumizu <tarumizu.kohei@...itsu.com>,
catalin.marinas@....com, will@...nel.org, tglx@...utronix.de,
mingo@...hat.com, bp@...en8.de, dave.hansen@...ux.intel.com,
x86@...nel.org, hpa@...or.com, rafael@...nel.org, lenb@...nel.org,
gregkh@...uxfoundation.org, mchehab+huawei@...nel.org,
eugenis@...gle.com, tony.luck@...el.com, pcc@...gle.com,
peterz@...radead.org, marcos@...a.pet, marcan@...can.st,
linus.walleij@...aro.org, nicolas.ferre@...rochip.com,
conor.dooley@...rochip.com, arnd@...db.de, ast@...nel.org,
peter.chen@...nel.org, kuba@...nel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-acpi@...r.kernel.org
Subject: Re: [PATCH v5 5/6] x86: Add Kconfig/Makefile to build hardware
prefetch control driver
On 6/7/22 05:05, Kohei Tarumizu wrote:
> diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
> index 4bed3abf444d..3ee173483f9f 100644
> --- a/arch/x86/Kconfig
> +++ b/arch/x86/Kconfig
> @@ -1359,6 +1359,23 @@ config X86_CPUID
> with major 203 and minors 0 to 31 for /dev/cpu/0/cpuid to
> /dev/cpu/31/cpuid.
>
> +config X86_HWPF_CONTROL
> + tristate "x86 Hardware Prefetch Control support"
> + depends on X86_64
> + help
> + This provides a sysfs interface to control the Hardware Prefetch
> + behavior for X86.
> +
> + Some Intel processors have MSR 0x1a4 (MSR_MISC_FEATURE_CONTROL),
> + which can control the hardware prefech behavior. If the processor
prefetch
> + supports this, the module can be loaded with the name x86-pfctl.
> +
> + Depending on the characteristics of the application, this register
> + parameters improve or degrade performance.
> +
> + Please see Documentation/ABI/testing/sysfs-devices-system-cpu for
> + more information.
> +
--
~Randy
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