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Message-ID: <7hr13z7b5u.fsf@baylibre.com>
Date:   Wed, 08 Jun 2022 02:32:45 -0700
From:   Kevin Hilman <khilman@...nel.org>
To:     Johnson Wang <johnson.wang@...iatek.com>, cw00.choi@...sung.com,
        krzk+dt@...nel.org, robh+dt@...nel.org, kyungmin.park@...sung.com
Cc:     djakov@...nel.org, linux-pm@...r.kernel.org,
        linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, jia-wei.chang@...iatek.com,
        Project_Global_Chrome_Upstream_Group@...iatek.com,
        Johnson Wang <johnson.wang@...iatek.com>
Subject: Re: [PATCH v7 0/2] Introduce MediaTek CCI devfreq driver

Johnson Wang <johnson.wang@...iatek.com> writes:

> The Cache Coherent Interconnect (CCI) is the management of cache
> coherency by hardware. CCI DEVFREQ is DVFS driver for power saving by
> scaling clock frequency and supply voltage of CCI. CCI uses the same
> input clock source and power rail as LITTLE CPUs on Mediatek SoCs.

Tested-by: Kevin Hilman <khilman@...libre.com>

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