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Message-ID: <add025b6-c622-b204-d39e-67b31878d37f@linaro.org>
Date: Wed, 8 Jun 2022 12:11:43 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Tomer Maimon <tmaimon77@...il.com>, avifishman70@...il.com,
tali.perry1@...il.com, joel@....id.au, venture@...gle.com,
yuenn@...gle.com, benjaminfair@...gle.com, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, mturquette@...libre.com,
sboyd@...nel.org, p.zabel@...gutronix.de,
gregkh@...uxfoundation.org, daniel.lezcano@...aro.org,
tglx@...utronix.de, wim@...ux-watchdog.org, linux@...ck-us.net,
catalin.marinas@....com, will@...nel.org, arnd@...db.de,
olof@...om.net, jirislaby@...nel.org, shawnguo@...nel.org,
bjorn.andersson@...aro.org, geert+renesas@...der.be,
marcel.ziswiler@...adex.com, vkoul@...nel.org,
biju.das.jz@...renesas.com, nobuhiro1.iwamatsu@...hiba.co.jp,
robert.hancock@...ian.com, j.neuschaefer@....net, lkundrak@...sk
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-clk@...r.kernel.org, linux-serial@...r.kernel.org,
linux-watchdog@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v2 12/20] dt-bindings: reset: npcm: Add support for
NPCM8XX
On 08/06/2022 11:56, Tomer Maimon wrote:
> Add binding document and device tree binding
> constants for Nuvoton BMC NPCM8XX reset controller.
>
> Signed-off-by: Tomer Maimon <tmaimon77@...il.com>
> ---
> .../bindings/reset/nuvoton,npcm-reset.yaml | 13 +-
> .../dt-bindings/reset/nuvoton,npcm8xx-reset.h | 128 ++++++++++++++++++
> 2 files changed, 140 insertions(+), 1 deletion(-)
> create mode 100644 include/dt-bindings/reset/nuvoton,npcm8xx-reset.h
>
> diff --git a/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.yaml b/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.yaml
> index c6bbc1589ab9..93ea81686f58 100644
> --- a/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.yaml
> +++ b/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.yaml
> @@ -9,9 +9,20 @@ title: Nuvoton NPCM Reset controller
> maintainers:
> - Tomer Maimon <tmaimon77@...il.com>
>
> +description: |
> + The NPCM reset controller used to reset various set of peripherals.
> + Please refer to reset.txt in this directory for common reset
> + controller binding usage.
> +
> + For list of all valid reset indices see
> + <dt-bindings/reset/nuvoton,npcm7xx-reset.h> for Poleg NPCM7XX SoC,
> + <dt-bindings/reset/nuvoton,npcm8xx-reset.h> for Arbel NPCM8XX SoC.
> +
> properties:
> compatible:
> - const: nuvoton,npcm750-reset
> + enum:
> + - nuvoton,npcm750-reset # Poleg NPCM7XX SoC
> + - nuvoton,npcm845-reset # Arbel NPCM8XX SoC
>
> reg:
> maxItems: 1
> diff --git a/include/dt-bindings/reset/nuvoton,npcm8xx-reset.h b/include/dt-bindings/reset/nuvoton,npcm8xx-reset.h
> new file mode 100644
> index 000000000000..5b3b74534b50
> --- /dev/null
> +++ b/include/dt-bindings/reset/nuvoton,npcm8xx-reset.h
> @@ -0,0 +1,128 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
Again - ignored comment from v1.
> +/*
> + * Copyright (c) 2022 Nuvoton Technology corporation.
> + * Author: Tomer Maimon <tmaimon77@...il.com>
> + */
> +
> +#ifndef _DT_BINDINGS_NPCM8XX_RESET_H
> +#define _DT_BINDINGS_NPCM8XX_RESET_H
> +
> +/* represent reset register offset */
> +#define NPCM8XX_RESET_IPSRST1 0x20
> +#define NPCM8XX_RESET_IPSRST2 0x24
> +#define NPCM8XX_RESET_IPSRST3 0x34
> +#define NPCM8XX_RESET_IPSRST4 0x74
> +
> +/* Reset lines on IP1 reset module (NPCM8XX_RESET_IPSRST1) */
Again - ignored comment from v1. My last message was quite clear, wasn't it?
https://lore.kernel.org/all/4a69902f-a545-23a1-1430-e5ece16997e9@linaro.org/
You ignored several of previous comments, so:
NAK.
Best regards,
Krzysztof
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