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Message-ID: <2d79719b8670a3693b210af5ab45716dba23999a.camel@pengutronix.de>
Date:   Wed, 08 Jun 2022 12:56:41 +0200
From:   Lucas Stach <l.stach@...gutronix.de>
To:     Liu Ying <victor.liu@....com>, linux-kernel@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org
Cc:     Thomas Gleixner <tglx@...utronix.de>,
        Marc Zyngier <maz@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        Fabio Estevam <festevam@...il.com>,
        NXP Linux Team <linux-imx@....com>
Subject: Re: [PATCH] irqchip/irq-imx-irqsteer: Get/put PM runtime in
 ->irq_unmask()/irq_mask()

Am Mittwoch, dem 08.06.2022 um 18:50 +0800 schrieb Liu Ying:
> Now that runtime PM support was added in this driver, we have
> to enable power before accessing irqchip registers.  And, after
> the access is done, we should disable power.  This patch calls
> pm_runtime_get_sync() in ->irq_unmask() and pm_runtime_put() in
> ->irq_mask() to make sure power is managed for the register access.
> 
Can you tell me in which case this is necessary? IIRC the IRQ core
already keeps the chip runtime resumed as soon as a IRQ is requested,
so why would it be in runtime suspend at mask/unmask?

Regards,
Lucas

> Fixes: 4730d2233311 ("irqchip/imx-irqsteer: Add runtime PM support")
> Cc: Thomas Gleixner <tglx@...utronix.de>
> Cc: Marc Zyngier <maz@...nel.org>
> Cc: Shawn Guo <shawnguo@...nel.org>
> Cc: Sascha Hauer <s.hauer@...gutronix.de>
> Cc: Pengutronix Kernel Team <kernel@...gutronix.de>
> Cc: Fabio Estevam <festevam@...il.com>
> Cc: NXP Linux Team <linux-imx@....com>
> Cc: Lucas Stach <l.stach@...gutronix.de>
> Signed-off-by: Liu Ying <victor.liu@....com>
> ---
>  drivers/irqchip/irq-imx-irqsteer.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/irqchip/irq-imx-irqsteer.c b/drivers/irqchip/irq-imx-irqsteer.c
> index 96230a04ec23..a5eabe71e8ab 100644
> --- a/drivers/irqchip/irq-imx-irqsteer.c
> +++ b/drivers/irqchip/irq-imx-irqsteer.c
> @@ -45,11 +45,14 @@ static int imx_irqsteer_get_reg_index(struct irqsteer_data *data,
>  
>  static void imx_irqsteer_irq_unmask(struct irq_data *d)
>  {
> +	struct device *dev = d->domain->dev;
>  	struct irqsteer_data *data = d->chip_data;
>  	int idx = imx_irqsteer_get_reg_index(data, d->hwirq);
>  	unsigned long flags;
>  	u32 val;
>  
> +	pm_runtime_get_sync(dev);
> +
>  	raw_spin_lock_irqsave(&data->lock, flags);
>  	val = readl_relaxed(data->regs + CHANMASK(idx, data->reg_num));
>  	val |= BIT(d->hwirq % 32);
> @@ -59,6 +62,7 @@ static void imx_irqsteer_irq_unmask(struct irq_data *d)
>  
>  static void imx_irqsteer_irq_mask(struct irq_data *d)
>  {
> +	struct device *dev = d->domain->dev;
>  	struct irqsteer_data *data = d->chip_data;
>  	int idx = imx_irqsteer_get_reg_index(data, d->hwirq);
>  	unsigned long flags;
> @@ -69,6 +73,8 @@ static void imx_irqsteer_irq_mask(struct irq_data *d)
>  	val &= ~BIT(d->hwirq % 32);
>  	writel_relaxed(val, data->regs + CHANMASK(idx, data->reg_num));
>  	raw_spin_unlock_irqrestore(&data->lock, flags);
> +
> +	pm_runtime_put(dev);
>  }
>  
>  static const struct irq_chip imx_irqsteer_irq_chip = {


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