linux-kernel - [tip: x86/cpu] x86: Fix comment for X86_FEATURE

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Message-ID: <165472566029.4207.7734270022087420736.tip-bot2@tip-bot2>
Date:   Wed, 08 Jun 2022 22:01:00 -0000
From:   "tip-bot2 for Wyes Karny" <tip-bot2@...utronix.de>
To:     linux-tip-commits@...r.kernel.org
Cc:     Wyes Karny <wyes.karny@....com>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        Zhang Rui <rui.zhang@...el.com>, x86@...nel.org,
        linux-kernel@...r.kernel.org
Subject: [tip: x86/cpu] x86: Fix comment for X86_FEATURE_ZEN

The following commit has been merged into the x86/cpu branch of tip:

Commit-ID:     6f33a9daff9f07906365c4054c90b225f346cd0e
Gitweb:        https://git.kernel.org/tip/6f33a9daff9f07906365c4054c90b225f346cd0e
Author:        Wyes Karny <wyes.karny@....com>
AuthorDate:    Mon, 06 Jun 2022 23:33:36 +05:30
Committer:     Dave Hansen <dave.hansen@...ux.intel.com>
CommitterDate: Wed, 08 Jun 2022 13:01:58 -07:00

x86: Fix comment for X86_FEATURE_ZEN

The feature X86_FEATURE_ZEN implies that the CPU based on Zen
microarchitecture. Call this out explicitly in the comment.

Signed-off-by: Wyes Karny <wyes.karny@....com>
Signed-off-by: Dave Hansen <dave.hansen@...ux.intel.com>
Tested-by: Zhang Rui <rui.zhang@...el.com>
Link: https://lkml.kernel.org/r/9931b01a85120a0d1faf0f244e8de3f2190e774c.1654538381.git-series.wyes.karny@amd.com
---
 arch/x86/include/asm/cpufeatures.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 73e643a..6141457 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -219,7 +219,7 @@
 #define X86_FEATURE_IBRS		( 7*32+25) /* Indirect Branch Restricted Speculation */
 #define X86_FEATURE_IBPB		( 7*32+26) /* Indirect Branch Prediction Barrier */
 #define X86_FEATURE_STIBP		( 7*32+27) /* Single Thread Indirect Branch Predictors */
-#define X86_FEATURE_ZEN			( 7*32+28) /* "" CPU is AMD family 0x17 or above (Zen) */
+#define X86_FEATURE_ZEN			(7*32+28) /* "" CPU based on Zen microarchitecture */
 #define X86_FEATURE_L1TF_PTEINV		( 7*32+29) /* "" L1TF workaround PTE inversion */
 #define X86_FEATURE_IBRS_ENHANCED	( 7*32+30) /* Enhanced IBRS */
 #define X86_FEATURE_MSR_IA32_FEAT_CTL	( 7*32+31) /* "" MSR IA32_FEAT_CTL configured */