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Message-Id: <20220607213604.3346000-15-seanjc@google.com>
Date: Tue, 7 Jun 2022 21:36:03 +0000
From: Sean Christopherson <seanjc@...gle.com>
To: Paolo Bonzini <pbonzini@...hat.com>
Cc: Sean Christopherson <seanjc@...gle.com>,
Vitaly Kuznetsov <vkuznets@...hat.com>,
Wanpeng Li <wanpengli@...cent.com>,
Jim Mattson <jmattson@...gle.com>,
Joerg Roedel <joro@...tes.org>, kvm@...r.kernel.org,
linux-kernel@...r.kernel.org, Eric Li <ercli@...avis.edu>,
David Matlack <dmatlack@...gle.com>,
Oliver Upton <oupton@...gle.com>
Subject: [PATCH v5 14/15] KVM: selftests: Extend VMX MSRs test to cover
CR4_FIXED1 (and its quirks)
Extend the VMX MSRs test to verify that KVM adheres to its established
quirky ABI for CR4_FIXED1 when VMX MSRS quirk is enabled, and that KV
doesn't touch CR4_FIXED1 when the quirk is disabled.
Signed-off-by: Sean Christopherson <seanjc@...gle.com>
---
.../selftests/kvm/include/x86_64/processor.h | 7 ++
.../selftests/kvm/x86_64/vmx_msrs_test.c | 65 +++++++++++++++++++
2 files changed, 72 insertions(+)
diff --git a/tools/testing/selftests/kvm/include/x86_64/processor.h b/tools/testing/selftests/kvm/include/x86_64/processor.h
index 51cab9b080f7..716e72bc9163 100644
--- a/tools/testing/selftests/kvm/include/x86_64/processor.h
+++ b/tools/testing/selftests/kvm/include/x86_64/processor.h
@@ -87,9 +87,16 @@ struct kvm_x86_cpu_feature {
#define X86_FEATURE_XSAVE KVM_X86_CPU_FEATURE(0x1, 0, ECX, 26)
#define X86_FEATURE_OSXSAVE KVM_X86_CPU_FEATURE(0x1, 0, ECX, 27)
#define X86_FEATURE_RDRAND KVM_X86_CPU_FEATURE(0x1, 0, ECX, 30)
+#define X86_FEATURE_VME KVM_X86_CPU_FEATURE(0x1, 0, EDX, 1)
+#define X86_FEATURE_DE KVM_X86_CPU_FEATURE(0x1, 0, EDX, 2)
+#define X86_FEATURE_PSE KVM_X86_CPU_FEATURE(0x1, 0, EDX, 3)
+#define X86_FEATURE_TSC KVM_X86_CPU_FEATURE(0x1, 0, EDX, 4)
+#define X86_FEATURE_PAE KVM_X86_CPU_FEATURE(0x1, 0, EDX, 6)
#define X86_FEATURE_MCE KVM_X86_CPU_FEATURE(0x1, 0, EDX, 7)
#define X86_FEATURE_APIC KVM_X86_CPU_FEATURE(0x1, 0, EDX, 9)
+#define X86_FEATURE_PGE KVM_X86_CPU_FEATURE(0x1, 0, EDX, 13)
#define X86_FEATURE_CLFLUSH KVM_X86_CPU_FEATURE(0x1, 0, EDX, 19)
+#define X86_FEATURE_FXSR KVM_X86_CPU_FEATURE(0x1, 0, EDX, 24)
#define X86_FEATURE_XMM KVM_X86_CPU_FEATURE(0x1, 0, EDX, 25)
#define X86_FEATURE_XMM2 KVM_X86_CPU_FEATURE(0x1, 0, EDX, 26)
#define X86_FEATURE_FSGSBASE KVM_X86_CPU_FEATURE(0x7, 0, EBX, 0)
diff --git a/tools/testing/selftests/kvm/x86_64/vmx_msrs_test.c b/tools/testing/selftests/kvm/x86_64/vmx_msrs_test.c
index 9be2c2e3acf1..c0c4252a6a03 100644
--- a/tools/testing/selftests/kvm/x86_64/vmx_msrs_test.c
+++ b/tools/testing/selftests/kvm/x86_64/vmx_msrs_test.c
@@ -143,6 +143,70 @@ static void load_and_clear_bndcfgs_test(struct kvm_vm *vm, struct kvm_vcpu *vcpu
test_vmx_ctrls(vm, vcpu, VM_ENTRY_LOAD_BNDCFGS, VM_EXIT_CLEAR_BNDCFGS);
}
+static void cr4_reserved_bit_test(struct kvm_vm *vm, struct kvm_vcpu *vcpu,
+ uint64_t cr4_bit,
+ struct kvm_x86_cpu_feature feature)
+{
+ uint64_t val;
+ int r;
+
+ if (!kvm_cpu_has(feature))
+ return;
+
+ vcpu_set_cpuid_feature(vcpu, feature);
+ val = vcpu_get_msr(vcpu, MSR_IA32_VMX_CR4_FIXED1);
+ TEST_ASSERT(val & cr4_bit,
+ "KVM should set CR4 bit when quirk and feature are enabled");
+
+ vcpu_clear_cpuid_feature(vcpu, feature);
+ val = vcpu_get_msr(vcpu, MSR_IA32_VMX_CR4_FIXED1);
+ TEST_ASSERT(!(val & cr4_bit),
+ "KVM should clear CR4 bit when quirk and feature are enabled");
+
+ r = _vcpu_set_msr(vcpu, MSR_IA32_VMX_CR4_FIXED1, val);
+ TEST_ASSERT(r == 0, "Writing CR4_FIXED1 should fail when quirk is enabled");
+
+ vm_enable_cap(vm, KVM_CAP_DISABLE_QUIRKS2, KVM_X86_QUIRK_TWEAK_VMX_MSRS);
+
+ val &= ~cr4_bit;
+ vcpu_set_msr(vcpu, MSR_IA32_VMX_CR4_FIXED1, val);
+
+ vcpu_set_cpuid_feature(vcpu, feature);
+ TEST_ASSERT(!(val & cr4_bit),
+ "KVM shouldn't set CR4 bit when quirk is disabled");
+
+ val |= cr4_bit;
+ vcpu_clear_cpuid_feature(vcpu, feature);
+ TEST_ASSERT(val & cr4_bit,
+ "KVM shouldn't clear CR4 bit when quirk is disabled");
+
+ vm_enable_cap(vm, KVM_CAP_DISABLE_QUIRKS2, 0);
+}
+
+static void cr4_reserved_bits_test(struct kvm_vm *vm, struct kvm_vcpu *vcpu)
+{
+ cr4_reserved_bit_test(vm, vcpu, X86_CR4_VME, X86_FEATURE_VME);
+ cr4_reserved_bit_test(vm, vcpu, X86_CR4_PVI, X86_FEATURE_VME);
+ cr4_reserved_bit_test(vm, vcpu, X86_CR4_TSD, X86_FEATURE_TSC);
+ cr4_reserved_bit_test(vm, vcpu, X86_CR4_DE, X86_FEATURE_DE);
+ cr4_reserved_bit_test(vm, vcpu, X86_CR4_PSE, X86_FEATURE_PSE);
+ cr4_reserved_bit_test(vm, vcpu, X86_CR4_PAE, X86_FEATURE_PAE);
+ cr4_reserved_bit_test(vm, vcpu, X86_CR4_MCE, X86_FEATURE_MCE);
+ cr4_reserved_bit_test(vm, vcpu, X86_CR4_PGE, X86_FEATURE_PGE);
+ cr4_reserved_bit_test(vm, vcpu, X86_CR4_OSFXSR, X86_FEATURE_FXSR);
+ cr4_reserved_bit_test(vm, vcpu, X86_CR4_OSXMMEXCPT, X86_FEATURE_XMM);
+ cr4_reserved_bit_test(vm, vcpu, X86_CR4_VMXE, X86_FEATURE_VMX);
+ cr4_reserved_bit_test(vm, vcpu, X86_CR4_SMXE, X86_FEATURE_SMX);
+ cr4_reserved_bit_test(vm, vcpu, X86_CR4_PCIDE, X86_FEATURE_PCID);
+ cr4_reserved_bit_test(vm, vcpu, X86_CR4_OSXSAVE, X86_FEATURE_XSAVE);
+ cr4_reserved_bit_test(vm, vcpu, X86_CR4_FSGSBASE, X86_FEATURE_FSGSBASE);
+ cr4_reserved_bit_test(vm, vcpu, X86_CR4_SMEP, X86_FEATURE_SMEP);
+ cr4_reserved_bit_test(vm, vcpu, X86_CR4_SMAP, X86_FEATURE_SMAP);
+ cr4_reserved_bit_test(vm, vcpu, X86_CR4_PKE, X86_FEATURE_PKU);
+ cr4_reserved_bit_test(vm, vcpu, X86_CR4_UMIP, X86_FEATURE_UMIP);
+ cr4_reserved_bit_test(vm, vcpu, X86_CR4_LA57, X86_FEATURE_LA57);
+}
+
int main(void)
{
struct kvm_vcpu *vcpu;
@@ -156,6 +220,7 @@ int main(void)
load_perf_global_ctrl_test(vm, vcpu);
load_and_clear_bndcfgs_test(vm, vcpu);
+ cr4_reserved_bits_test(vm, vcpu);
kvm_vm_free(vm);
}
--
2.36.1.255.ge46751e96f-goog
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