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Message-ID: <57776fa5-4eaf-7074-9bc1-5401da637980@microchip.com>
Date: Thu, 9 Jun 2022 15:18:31 +0000
From: <Conor.Dooley@...rochip.com>
To: <robh@...nel.org>, <atulkhare@...osinc.com>, <palmer@...osinc.com>
CC: <Conor.Dooley@...rochip.com>, <linux-i2c@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-mmc@...r.kernel.org>, <linux-riscv@...ts.infradead.org>
Subject: Re: [PATCH v2 0/2] dt-bindings: sifive: fix dt-schema errors
On 09/06/2022 16:13, Rob Herring wrote:
> On Wed, Jun 08, 2022 at 04:39:23PM -0700, Atul Khare wrote:
>> The patch series fixes dt-schema validation errors that can be reproduced
>> using the following: make ARCH=riscv defconfig; make ARCH=riscv
>> dt_binding_check dtbs_check
>>
>> This is a rebased version of https://tinyurl.com/yvdvmsjd, and excludes
>> two patches that are now redundant.
>>
>> Atul Khare (2):
>> dt-bindings: sifive: add cache-set value of 2048
>> dt-bindings: sifive: add gpio-line-names
>
> Your series is not properly threaded. git-send-email does this for you
> by default unless you tell it not to.
Aye, v1 was the same.
@Palmer could you please give Atul a hand w/ mail client/send email
things?
Thanks,
Conor.
>
>>
>> Documentation/devicetree/bindings/gpio/sifive,gpio.yaml | 3 +++
>> Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml | 4 +++-
>> 2 files changed, 6 insertions(+), 1 deletion(-)
>>
>> --
>> 2.34.1
>>
>
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