linux-kernel - Re: [PATCH v4 2/2] PCI: xilinx-cpm: Add support for Versal CPM5 Root Port

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Date:   Thu, 9 Jun 2022 12:32:01 -0500
From:   Bjorn Helgaas <helgaas@...nel.org>
To:     Michal Simek <michal.simek@...inx.com>
Cc:     Bharat Kumar Gogada <bharat.kumar.gogada@...inx.com>,
        linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, lorenzo.pieralisi@....com,
        bhelgaas@...gle.com, robh@...nel.org
Subject: Re: [PATCH v4 2/2] PCI: xilinx-cpm: Add support for Versal CPM5 Root
 Port

On Thu, Jun 09, 2022 at 09:59:08AM +0200, Michal Simek wrote:
> On 6/8/22 21:14, Bjorn Helgaas wrote:
> > On Wed, Jun 08, 2022 at 10:10:46PM +0530, Bharat Kumar Gogada wrote:
> > > Xilinx Versal Premium series has CPM5 block which supports Root Port
> > > functioning at Gen5 speed.
> > > 
> > > Xilinx Versal CPM5 has few changes with existing CPM block.
> > > - CPM5 has dedicated register space for control and status registers.
> > > - CPM5 legacy interrupt handling needs additional register bit
> > >    to enable and handle legacy interrupts.
> > > 
> > > Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@...inx.com>
> > > ---
> > >   drivers/pci/controller/pcie-xilinx-cpm.c | 33 +++++++++++++++++++++++-
> > >   1 file changed, 32 insertions(+), 1 deletion(-)
> > 
> > Per MAINTAINERS, xilinx-cpm lacks a maintainer.  Can we get one?
> 
> Bharat should become maintainer for this driver.
> 
> My fragment should cover xilinx things in general in case Bharat is
> not available.

Great!  Can one of you post a patch to show exactly what you have in
mind?

Thanks,
  Bjorn