lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20220609182537.zbqk7gqsyscayv7b@notapiano>
Date:   Thu, 9 Jun 2022 14:25:37 -0400
From:   NĂ­colas F. R. A. Prado 
        <nfraprado@...labora.com>
To:     Guodong Liu <guodong.liu@...iatek.com>
Cc:     Linus Walleij <linus.walleij@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Sean Wang <sean.wang@...nel.org>,
        Sean Wang <sean.wang@...iatek.com>,
        Zhiyong Tao <zhiyong.tao@...iatek.com>,
        linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Project_Global_Chrome_Upstream_Group@...iatek.com
Subject: Re: [PATCH v1 2/4] pinctrl: add drive for I2C related pins on mt8192

Hi Guodong,

thank you for the patch. Please see some suggestions below.

On Wed, Jun 08, 2022 at 01:39:07PM +0800, Guodong Liu wrote:
> This patch provides the advanced drive raw data setting version
> for I2C used pins on mt8192

Please add "mediatek:" on the commit title for this patch and patch 1, like you
did for 3 and 4.

> 
> Signed-off-by: Guodong Liu <guodong.liu@...iatek.com>
> ---
>  drivers/pinctrl/mediatek/pinctrl-mt8192.c | 31 +++++++++++++++++++++--
>  1 file changed, 29 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8192.c b/drivers/pinctrl/mediatek/pinctrl-mt8192.c
> index 9faf7001369d..d11ff5519e1e 100644
> --- a/drivers/pinctrl/mediatek/pinctrl-mt8192.c
> +++ b/drivers/pinctrl/mediatek/pinctrl-mt8192.c
> @@ -1259,6 +1259,32 @@ static const struct mtk_pin_field_calc mt8192_pin_r1_range[] = {
>  	PIN_FIELD_BASE(205, 205, 8, 0x0070, 0x10, 5, 1),
>  };
>  
> +static const struct mtk_pin_field_calc mt8192_pin_drv_adv_range[] = {
> +	PIN_FIELD_BASE(89, 89, 2, 0x0040, 0x10, 0, 5),
> +	PIN_FIELD_BASE(90, 90, 2, 0x0040, 0x10, 5, 5),
> +
> +	PIN_FIELD_BASE(118, 118, 4, 0x0040, 0x10, 0, 3),
> +	PIN_FIELD_BASE(119, 119, 4, 0x0040, 0x10, 18, 3),
> +	PIN_FIELD_BASE(120, 120, 4, 0x0040, 0x10, 15, 3),
> +	PIN_FIELD_BASE(121, 121, 4, 0x0050, 0x10, 3, 3),
> +	PIN_FIELD_BASE(122, 122, 4, 0x0040, 0x10, 12, 3),
> +	PIN_FIELD_BASE(123, 123, 4, 0x0050, 0x10, 0, 3),
> +	PIN_FIELD_BASE(124, 124, 4, 0x0040, 0x10, 9, 3),
> +	PIN_FIELD_BASE(125, 125, 4, 0x0040, 0x10, 27, 3),
> +	PIN_FIELD_BASE(139, 139, 4, 0x0040, 0x10, 6, 3),
> +	PIN_FIELD_BASE(140, 140, 4, 0x0040, 0x10, 24, 3),
> +	PIN_FIELD_BASE(141, 141, 4, 0x0040, 0x10, 3, 3),
> +	PIN_FIELD_BASE(142, 142, 4, 0x0040, 0x10, 21, 3),
> +	PIN_FIELD_BASE(160, 160, 7, 0x0030, 0x10, 0, 3),
> +	PIN_FIELD_BASE(161, 161, 7, 0x0030, 0x10, 3, 3),
> +	PIN_FIELD_BASE(200, 200, 8, 0x0010, 0x10, 3, 3),
> +	PIN_FIELD_BASE(201, 201, 8, 0x0010, 0x10, 9, 3),
> +	PIN_FIELD_BASE(202, 202, 5, 0x0020, 0x10, 0, 3),
> +	PIN_FIELD_BASE(203, 203, 5, 0x0020, 0x10, 3, 3),
> +	PIN_FIELD_BASE(204, 204, 8, 0x0010, 0x10, 0, 3),
> +	PIN_FIELD_BASE(205, 205, 8, 0x0010, 0x10, 6, 3),
> +};
> +
>  static const struct mtk_pin_field_calc mt8192_pin_e1e0en_range[] = {
>  	PIN_FIELD_BASE(118, 118, 4, 0x0040, 0x10, 0, 1),
>  	PIN_FIELD_BASE(119, 119, 4, 0x0040, 0x10, 18, 1),
> @@ -1357,6 +1383,7 @@ static const struct mtk_pin_reg_calc mt8192_reg_cals[PINCTRL_PIN_REG_MAX] = {
>  	[PINCTRL_PIN_REG_R1] = MTK_RANGE(mt8192_pin_r1_range),
>  	[PINCTRL_PIN_REG_DRV_EN] = MTK_RANGE(mt8192_pin_e1e0en_range),
>  	[PINCTRL_PIN_REG_DRV_E0] = MTK_RANGE(mt8192_pin_e0_range),
> +	[PINCTRL_PIN_REG_DRV_ADV]	= MTK_RANGE(mt8192_pin_drv_adv_range),

Nit: use space instead of tab before the =.

Thanks,
NĂ­colas

>  	[PINCTRL_PIN_REG_DRV_E1] = MTK_RANGE(mt8192_pin_e1_range),
>  };
>  
> @@ -1376,8 +1403,8 @@ static const struct mtk_pin_soc mt8192_data = {
>  	.drive_get	= mtk_pinconf_drive_get_rev1,
>  	.adv_pull_get = mtk_pinconf_adv_pull_get,
>  	.adv_pull_set = mtk_pinconf_adv_pull_set,
> -	.adv_drive_get = mtk_pinconf_adv_drive_get,
> -	.adv_drive_set = mtk_pinconf_adv_drive_set,
> +	.adv_drive_get	= mtk_pinconf_adv_drive_get_raw,
> +	.adv_drive_set	= mtk_pinconf_adv_drive_set_raw,
>  };
>  
>  static const struct of_device_id mt8192_pinctrl_of_match[] = {
> -- 
> 2.25.5
> 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ