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Message-Id: <20220609224200.D1E8BC34114@smtp.kernel.org>
Date:   Thu, 09 Jun 2022 15:41:58 -0700
From:   Stephen Boyd <sboyd@...nel.org>
To:     Aidan MacDonald <aidanmacdonald.0x0@...il.com>,
        mturquette@...libre.com, paul@...pouillou.net
Cc:     linux-mips@...r.kernel.org, linux-clk@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] clk: ingenic-tcu: Properly enable registers before accessing timers

Quoting Aidan MacDonald (2022-06-03 06:47:05)
> Access to registers is guarded by ingenic_tcu_{enable,disable}_regs()
> so the stop bit can be cleared before accessing a timer channel, but
> those functions did not clear the stop bit on SoCs with a global TCU
> clock gate.
> 
> Testing on the X1000 has revealed that the stop bits must be cleared
> _and_ the global TCU clock must be ungated to access timer registers.
> Programming manuals for the X1000, JZ4740, and JZ4725B specify this
> behavior. If the stop bit isn't cleared, then writes to registers do
> not take effect, which can leave clocks with no defined parent when
> registered and leave clock tree state out of sync with the hardware,
> triggering bugs in downstream drivers relying on TCU clocks.
> 
> Fixing this is easy: have ingenic_tcu_{enable,disable}_regs() always
> clear the stop bit, regardless of the presence of a global TCU gate.
> 
> Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@...il.com>
> ---

Any Fixes: tag?

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