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Message-ID: <b51610ec-a77a-7293-bef1-1a8ce0f882c8@microchip.com>
Date: Thu, 9 Jun 2022 06:22:04 +0000
From: <Conor.Dooley@...rochip.com>
To: <atulkhare@...osinc.com>, <palmer@...osinc.com>
CC: <linux-i2c@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <linux-mmc@...r.kernel.org>,
<linux-riscv@...ts.infradead.org>, <robh@...nel.org>
Subject: Re: [PATCH v2 0/2] dt-bindings: sifive: fix dt-schema errors
On 09/06/2022 00:39, Atul Khare wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> The patch series fixes dt-schema validation errors that can be reproduced
> using the following: make ARCH=riscv defconfig; make ARCH=riscv
> dt_binding_check dtbs_check
>
> This is a rebased version of https://tinyurl.com/yvdvmsjd, and excludes
> two patches that are now redundant.
>
Hey Atul,
Odd CC list you have there. Did you take it from my series by any chance?
Please run scripts/get_maintainer.pl on your patches and use that CC
list instead. Also, please just link directly to lore rather than using
the tinyurl links.
> Atul Khare (2):
> dt-bindings: sifive: add cache-set value of 2048
> dt-bindings: sifive: add gpio-line-names
For the patches themselves, please use the subsystems rather than
just putting "sifive" in the subject.
Thanks,
Conor.
>
> Documentation/devicetree/bindings/gpio/sifive,gpio.yaml | 3 +++
> Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml | 4 +++-
> 2 files changed, 6 insertions(+), 1 deletion(-)
>
> --
> 2.34.1
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