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Message-ID: <CAE-0n53TTyQ9FOcYCT-51wJZd2HP-VfAgTkGBk4gV3jawRPi1w@mail.gmail.com>
Date: Fri, 10 Jun 2022 13:07:52 -0700
From: Stephen Boyd <swboyd@...omium.org>
To: Linus Walleij <linus.walleij@...aro.org>,
Srinivasa Rao Mandadapu <quic_srivasam@...cinc.com>,
agross@...nel.org, alsa-devel@...a-project.org,
bgoswami@...cinc.com, bjorn.andersson@...aro.org,
broonie@...nel.org, devicetree@...r.kernel.org,
judyhsiao@...omium.org, lgirdwood@...il.com,
linux-arm-msm@...r.kernel.org, linux-gpio@...r.kernel.org,
linux-kernel@...r.kernel.org, perex@...ex.cz,
quic_plai@...cinc.com, quic_rohkumar@...cinc.com,
robh+dt@...nel.org, srinivas.kandagatla@...aro.org, tiwai@...e.com
Subject: Re: [PATCH v3 2/2] pinctrl: qcom: sc7280: Add clock optional check
for ADSP bypass targets
Quoting Srinivasa Rao Mandadapu (2022-06-10 07:45:35)
> diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
> index 74810ec..6e03529 100644
> --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
> +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
> @@ -388,6 +388,9 @@ int lpi_pinctrl_probe(struct platform_device *pdev)
> pctrl->data = data;
> pctrl->dev = &pdev->dev;
>
> + if (of_property_read_bool(np, "qcom,adsp-bypass-mode"))
> + data->is_clk_optional = true;
> +
Or just
data->is_clk_optional = of_property_read_bool(np, "qcom,adsp-bypass-mode");
> pctrl->clks[0].id = "core";
> pctrl->clks[1].id = "audio";
>
> diff --git a/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c
> index 2add9a4..3fc7de1 100644
> --- a/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c
> +++ b/drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c
> @@ -141,7 +141,7 @@ static const struct lpi_pinctrl_variant_data sc7280_lpi_data = {
> .ngroups = ARRAY_SIZE(sc7280_groups),
> .functions = sc7280_functions,
> .nfunctions = ARRAY_SIZE(sc7280_functions),
> - .is_clk_optional = true,
> + .is_clk_optional = false,
Just drop it as 'false' is the default.
Otherwise
Reviewed-by: Stephen Boyd <swboyd@...omium.org>
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