linux-kernel - Re: [PATCH v8 00/14] Add some DRM bridge drivers support for i.MX8qm/qxp SoCs

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Message-ID: <c96522a1ebfe79d7a0cb8bf6311c59d92b015c5c.camel@nxp.com>
Date:   Fri, 10 Jun 2022 10:27:36 +0800
From:   Liu Ying <victor.liu@....com>
To:     Laurent Pinchart <laurent.pinchart@...asonboard.com>
Cc:     dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-media@...r.kernel.org, andrzej.hajda@...el.com,
        narmstrong@...libre.com, robert.foss@...aro.org, jonas@...boo.se,
        jernej.skrabec@...il.com, airlied@...ux.ie, daniel@...ll.ch,
        robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        shawnguo@...nel.org, s.hauer@...gutronix.de, kernel@...gutronix.de,
        festevam@...il.com, linux-imx@....com, lee.jones@...aro.org,
        mchehab@...nel.org, marcel.ziswiler@...adex.com
Subject: Re: [PATCH v8 00/14] Add some DRM bridge drivers support for
 i.MX8qm/qxp SoCs

Hi Laurent,

On Thu, 2022-06-09 at 12:32 +0300, Laurent Pinchart wrote:
> Hi Liu,
> 
> On Thu, Jun 09, 2022 at 02:49:17PM +0800, Liu Ying wrote:
> > Hi,
> > 
> > This is the v8 series to add some DRM bridge drivers support
> > for i.MX8qm/qxp SoCs.
> > 
> > The bridges may chain one by one to form display pipes to support
> > LVDS displays.  The relevant display controller is DPU embedded in
> > i.MX8qm/qxp SoCs.
> > 
> > The DPU KMS driver can be found at:
> > 
https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.kernel.org%2Fproject%2Fdri-devel%2Flist%2F%3Fseries%3D629908%26state%3D%252A%26archive%3Dboth&amp;data=05%7C01%7Cvictor.liu%40nxp.com%7C52bc453b59654345591f08da49faf477%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C1%7C637903639438033239%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%7C&amp;sdata=ciw5SX%2FdUHu5z6tVpY383LBxkWmEoFu03ljhrkKsj%2FQ%3D&amp;reserved=0
> > 
> > This series supports the following display pipes:
> > 1) i.MX8qxp:
> > prefetch eng -> DPU -> pixel combiner -> pixel link ->
> > pixel link to DPI(PXL2DPI) -> LVDS display bridge(LDB)
> > 
> > 2) i.MX8qm:
> > prefetch eng -> DPU -> pixel combiner -> pixel link -> LVDS display
> > bridge(LDB)
> > 
> > 
> > Patch 1/14 and 2/14 add bus formats used by pixel combiner.
> > 
> > Patch 9/14 adds a helper for LDB bridge drivers.
> > 
> > Patch 3/14 ~ 8/14 and 10/14 ~ 12/14 add drm bridge drivers and
> > dt-bindings support for the bridges.
> > 
> > Patch 13/14 adds dt-binding for Control and Status Registers
> > module(a syscon
> > used by PXL2DPI and LDB), which references the PXL2DPI and LDB
> > schemas.
> > 
> > Patch 14/14 updates MAINTAINERS.
> > 
> > 
> > I've tested this series with a koe,tx26d202vm0bwa dual link LVDS
> > panel and
> > a LVDS to HDMI bridge(with a downstream drm bridge driver).
> > 
> > Marcel Ziswiler has tested v6 with two LVDS panels(single link
> > LT170410-2WHC
> > and dual link LP156WF1) on Toradex Colibri iMX8X.
> > 
> > 
> > Welcome comments, thanks.
> 
> I'm not sure if this comment will be welcome, but what's the reason
> to
> handle the pixel combiner and pixel link (DPL) as bridges ? They seem
> very tightly couple with the display controller, wouldn't it be
> better
> to handle them in the display controller driver ?

i.MX8qxp display controller, pixel combiner and pixel link are
standalone IPs. i.MX8qxp reference manual has separate chapters for
them.  Not sure if pixel combiner and/or pixel link will be used to
work with other display controllers in future SoCs. So, it looks
appropriate to take them as separate bridges. 

Regards,
Liu Ying