[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAHp75Vd6y7RJcwi_Egyb5guJ3i+FJHD-_pdeOmq4LC7xBmhnPg@mail.gmail.com>
Date: Fri, 10 Jun 2022 16:37:05 +0200
From: Andy Shevchenko <andy.shevchenko@...il.com>
To: Xiaohui Zhang <xiaohuizhang@....edu.cn>
Cc: Jonathan Cameron <jic23@...nel.org>,
Lars-Peter Clausen <lars@...afoo.de>,
Gwendal Grignou <gwendal@...omium.org>,
Stephen Boyd <swboyd@...omium.org>,
Jongpil Jung <jongpil19.jung@...sung.com>,
linux-iio <linux-iio@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/1] iio:proximity:sx9360: Fix hardware gain read/write
On Fri, Jun 10, 2022 at 7:53 AM Xiaohui Zhang <xiaohuizhang@....edu.cn> wrote:
>
> Similar to the handling of read/write in commit 108e4d4de2b5
> ("iio:proximity:sx9324: Fix hardware gain read/write"), we thought
> a patch might be needed here as well.
>
> There are four possible gain values according to 'sx9360_gain_vals[]':
>
> 1, 2, 4, and 8
>
> The values are off by one when writing and reading the register. The
> bits should be set according to this equation:
>
> ilog2(<gain>) + 1
>
> so that a gain of 8 is 0x4 in the register field and a gain of 4 is 0x3
> in the register field, etc. Note that a gain of 0 is reserved per the
> datasheet. The default gain (SX9360_REG_PROX_CTRL0_GAIN_1) is also
> wrong. It should be 0x1 << 3, i.e. 0x8, not 0x80 which is setting the
> reserved bit 7.
>
> Fix this all up to properly handle the hardware gain and return errors
> for invalid settings.
...
> + regval = FIELD_GET(SX9360_REG_PROX_CTRL0_GAIN_MASK, regval);
> + if (regval)
> + regval--;
> + else if (regval == SX9360_REG_PROX_CTRL0_GAIN_RSVD ||
> + regval > SX9360_REG_PROX_CTRL0_GAIN_8)
else?! Isn't it a dead code? How has it been tested?
> + return -EINVAL;
> + *val = 1 << regval;
Even in the original code this is wrong in accordance with C standard.
It might have potentially UB. BIT(), for example, solves this issue.
You may do what it does under the hood.
--
With Best Regards,
Andy Shevchenko
Powered by blists - more mailing lists