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Message-ID: <20220611171455.13798411@jic23-huawei>
Date:   Sat, 11 Jun 2022 17:14:55 +0100
From:   Jonathan Cameron <jic23@...nel.org>
To:     Olivier Moysan <olivier.moysan@...s.st.com>
Cc:     Alexandre Torgue <alexandre.torgue@...s.st.com>,
        Fabrice Gasnier <fabrice.gasnier@...s.st.com>,
        Lars-Peter Clausen <lars@...afoo.de>,
        Maxime Coquelin <mcoquelin.stm32@...il.com>,
        Paul Cercueil <paul@...pouillou.net>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-iio@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-stm32@...md-mailman.stormreply.com>
Subject: Re: [PATCH] iio: adc: stm32: fix maximum clock rate for stm32mp15x

On Thu, 9 Jun 2022 11:52:34 +0200
Olivier Moysan <olivier.moysan@...s.st.com> wrote:

> Change maximum STM32 ADC input clock rate to 36MHz, as specified
> in STM32MP15x datasheets.
> 
> Fixes: d58c67d1d851 ("iio: adc: stm32-adc: add support for STM32MP1")
No gap here as per the other patch. Fixed up whilst applying and marked
for stable.

Thanks,

Jonathan

> 
> Signed-off-by: Olivier Moysan <olivier.moysan@...s.st.com>
> ---
>  drivers/iio/adc/stm32-adc-core.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/iio/adc/stm32-adc-core.c b/drivers/iio/adc/stm32-adc-core.c
> index 142656232157..ce1a63a82034 100644
> --- a/drivers/iio/adc/stm32-adc-core.c
> +++ b/drivers/iio/adc/stm32-adc-core.c
> @@ -805,7 +805,7 @@ static const struct stm32_adc_priv_cfg stm32h7_adc_priv_cfg = {
>  static const struct stm32_adc_priv_cfg stm32mp1_adc_priv_cfg = {
>  	.regs = &stm32h7_adc_common_regs,
>  	.clk_sel = stm32h7_adc_clk_sel,
> -	.max_clk_rate_hz = 40000000,
> +	.max_clk_rate_hz = 36000000,
>  	.has_syscfg = HAS_VBOOSTER | HAS_ANASWVDD,
>  	.num_irqs = 2,
>  };

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