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Message-ID: <5e557269561d62972f8e44490bf7a6f97088f56b.camel@mediatek.com>
Date: Mon, 13 Jun 2022 13:26:52 +0800
From: Rex-BC Chen <rex-bc.chen@...iatek.com>
To: <mturquette@...libre.com>, <sboyd@...nel.org>,
<matthias.bgg@...il.com>, <robh+dt@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>
CC: <p.zabel@...gutronix.de>,
<angelogioacchino.delregno@...labora.com>,
<nfraprado@...labora.com>, <chun-jie.chen@...iatek.com>,
<wenst@...omium.org>, <runyang.chen@...iatek.com>,
<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-clk@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
<Project_Global_Chrome_Upstream_Group@...iatek.com>
Subject: Re: [RESEND v8 00/19] Cleanup MediaTek clk reset drivers and
support SoCs
On Mon, 2022-05-23 at 17:33 +0800, Rex-BC Chen wrote:
> In this series, we cleanup MediaTek clock reset drivers in
> clk/mediatek
> folder. MediaTek clock reset driver is used to provide reset control
> of modules controlled in clk, like infra_ao.
>
> Changes for v8 resend:
> 1. Remove tested-by tag from NĂcolas for MT8195/MT8186 patches.
> 2. Add reviewed-by tag from AngeloGioacchino.
>
> Changes for v8:
> 1. Use 'enum mtk_reset_version' to replace u8 in patch 5 and 6.
> 2. Use lowercase '0xc' in patch 7.
> 3. Drop "simple-mfd" in patch 16 because it's for original reset
> controller.
> 4. v8 is based on linux-next next-20220520 and Chen-Yu's series[1].
>
> Changes for v7:
> 1. v7 is based on linux-next next-20220519 and Chen-Yu's series[1].
> 2. Add support for MT8186.
>
> [1]:
> https://patchwork.kernel.org/project/linux-mediatek/list/?series=643003
>
> Changes for v6:
> 1. Add a new patch to support inuput argument index mode.
> 2. Revise definition in reset.h to index.
>
> Rex-BC Chen (19):
> clk: mediatek: reset: Add reset.h
> clk: mediatek: reset: Fix written reset bit offset
> clk: mediatek: reset: Refine and reorder functions in reset.c
> clk: mediatek: reset: Extract common drivers to update function
> clk: mediatek: reset: Merge and revise reset register function
> clk: mediatek: reset: Revise structure to control reset register
> clk: mediatek: reset: Support nonsequence base offsets of reset
> registers
> clk: mediatek: reset: Support inuput argument index mode
> clk: mediatek: reset: Change return type for clock reset register
> function
> clk: mediatek: reset: Add new register reset function with device
> clk: mediatek: reset: Add reset support for simple probe
> dt-bindings: arm: mediatek: Add #reset-cells property for
> MT8192/MT8195
> dt-bindings: reset: mediatek: Add infra_ao reset index for
> MT8192/MT8195
> clk: mediatek: reset: Add infra_ao reset support for MT8192/MT8195
> arm64: dts: mediatek: Add infra #reset-cells property for MT8192
> arm64: dts: mediatek: Add infra #reset-cells property for MT8195
> dt-bindings: reset: mediatek: Add infra_ao reset index for MT8186
> dt-bindings: arm: mediatek: Add #reset-cells property for MT8186
> clk: mediatek: reset: Add infra_ao reset support for MT8186
>
> .../mediatek/mediatek,mt8186-sys-clock.yaml | 3 +
> .../mediatek/mediatek,mt8192-sys-clock.yaml | 3 +
> .../mediatek/mediatek,mt8195-sys-clock.yaml | 3 +
> arch/arm64/boot/dts/mediatek/mt8192.dtsi | 1 +
> arch/arm64/boot/dts/mediatek/mt8195.dtsi | 15 +-
> drivers/clk/mediatek/clk-mt2701-eth.c | 10 +-
> drivers/clk/mediatek/clk-mt2701-g3d.c | 10 +-
> drivers/clk/mediatek/clk-mt2701-hif.c | 10 +-
> drivers/clk/mediatek/clk-mt2701.c | 22 +-
> drivers/clk/mediatek/clk-mt2712.c | 22 +-
> drivers/clk/mediatek/clk-mt7622-eth.c | 10 +-
> drivers/clk/mediatek/clk-mt7622-hif.c | 12 +-
> drivers/clk/mediatek/clk-mt7622.c | 22 +-
> drivers/clk/mediatek/clk-mt7629-eth.c | 10 +-
> drivers/clk/mediatek/clk-mt7629-hif.c | 12 +-
> drivers/clk/mediatek/clk-mt8135.c | 22 +-
> drivers/clk/mediatek/clk-mt8173.c | 22 +-
> drivers/clk/mediatek/clk-mt8183.c | 18 +-
> drivers/clk/mediatek/clk-mt8186-infra_ao.c | 23 ++
> drivers/clk/mediatek/clk-mt8192.c | 29 +++
> drivers/clk/mediatek/clk-mt8195-infra_ao.c | 24 +++
> drivers/clk/mediatek/clk-mtk.c | 7 +
> drivers/clk/mediatek/clk-mtk.h | 9 +-
> drivers/clk/mediatek/reset.c | 198 +++++++++++++---
> --
> drivers/clk/mediatek/reset.h | 82 ++++++++
> include/dt-bindings/reset/mt8186-resets.h | 5 +
> include/dt-bindings/reset/mt8192-resets.h | 8 +
> include/dt-bindings/reset/mt8195-resets.h | 6 +
> 28 files changed, 523 insertions(+), 95 deletions(-)
> create mode 100644 drivers/clk/mediatek/reset.h
>
Hello Stephen,
Gentle ping for this series.
I also pushed another series to move these drivers to drivers/reset
folder[1], but I think we still can let this series merged.
If you have any comments for [1], please let me know.
Thanks.
[1]:
https://patchwork.kernel.org/project/linux-mediatek/patch/20220527090355.7354-1-rex-bc.chen@mediatek.com/
BRs,
Bo-Chen
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