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Message-ID: <20220613080932.663-6-thunder.leizhen@huawei.com>
Date: Mon, 13 Jun 2022 16:09:32 +0800
From: Zhen Lei <thunder.leizhen@...wei.com>
To: Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
<x86@...nel.org>, "H . Peter Anvin" <hpa@...or.com>,
Eric Biederman <ebiederm@...ssion.com>,
Rob Herring <robh+dt@...nel.org>,
Frank Rowand <frowand.list@...il.com>,
<devicetree@...r.kernel.org>, Dave Young <dyoung@...hat.com>,
Baoquan He <bhe@...hat.com>, Vivek Goyal <vgoyal@...hat.com>,
<kexec@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>,
<linux-arm-kernel@...ts.infradead.org>,
Jonathan Corbet <corbet@....net>, <linux-doc@...r.kernel.org>
CC: Zhen Lei <thunder.leizhen@...wei.com>,
Randy Dunlap <rdunlap@...radead.org>,
Feng Zhou <zhoufeng.zf@...edance.com>,
Kefeng Wang <wangkefeng.wang@...wei.com>,
Chen Zhou <dingguo.cz@...group.com>,
"John Donnelly" <John.p.donnelly@...cle.com>,
Dave Kleikamp <dave.kleikamp@...cle.com>
Subject: [PATCH 5/5] arm64: kdump: Don't defer the reservation of crash high memory
If the crashkernel has both high memory above DMA zones and low memory
in DMA zones, kexec always loads the content such as Image and dtb to the
high memory instead of the low memory. This means that only high memory
requires write protection based on page-level mapping. The allocation of
high memory does not depend on the DMA boundary. So we can reserve the
high memory first even if the crashkernel reservation is deferred.
This means that the block mapping can still be performed on other kernel
linear address spaces, the TLB miss rate can be reduced and the system
performance will be improved.
Signed-off-by: Zhen Lei <thunder.leizhen@...wei.com>
---
arch/arm64/mm/init.c | 71 ++++++++++++++++++++++++++++++++++++++++----
1 file changed, 65 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
index fb24efbc46f5ef4..ae0bae2cafe6ab0 100644
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -141,15 +141,44 @@ static void __init reserve_crashkernel(int dma_state)
unsigned long long crash_max = CRASH_ADDR_LOW_MAX;
char *cmdline = boot_command_line;
int dma_enabled = IS_ENABLED(CONFIG_ZONE_DMA) || IS_ENABLED(CONFIG_ZONE_DMA32);
- int ret;
+ int ret, skip_res = 0, skip_low_res = 0;
bool fixed_base;
if (!IS_ENABLED(CONFIG_KEXEC_CORE))
return;
- if ((!dma_enabled && (dma_state != DMA_PHYS_LIMIT_UNKNOWN)) ||
- (dma_enabled && (dma_state != DMA_PHYS_LIMIT_KNOWN)))
- return;
+ /*
+ * In the following table:
+ * X,high means crashkernel=X,high
+ * unknown means dma_state = DMA_PHYS_LIMIT_UNKNOWN
+ * known means dma_state = DMA_PHYS_LIMIT_KNOWN
+ *
+ * The first two columns indicate the status, and the last two
+ * columns indicate the phase in which crash high or low memory
+ * needs to be reserved.
+ * ---------------------------------------------------
+ * | DMA enabled | X,high used | unknown | known |
+ * ---------------------------------------------------
+ * | N N | low | NOP |
+ * | Y N | NOP | low |
+ * | N Y | high/low | NOP |
+ * | Y Y | high | low |
+ * ---------------------------------------------------
+ *
+ * But in this function, the crash high memory allocation of
+ * crashkernel=Y,high and the crash low memory allocation of
+ * crashkernel=X[@offset] for crashk_res are mixed at one place.
+ * So the table above need to be adjusted as below:
+ * ---------------------------------------------------
+ * | DMA enabled | X,high used | unknown | known |
+ * ---------------------------------------------------
+ * | N N | res | NOP |
+ * | Y N | NOP | res |
+ * | N Y |res/low_res| NOP |
+ * | Y Y | res | low_res |
+ * ---------------------------------------------------
+ *
+ */
/* crashkernel=X[@offset] */
ret = parse_crashkernel(cmdline, memblock_phys_mem_size(),
@@ -169,10 +198,33 @@ static void __init reserve_crashkernel(int dma_state)
else if (ret)
return;
+ /* See the third row of the second table above, NOP */
+ if (!dma_enabled && (dma_state == DMA_PHYS_LIMIT_KNOWN))
+ return;
+
+ /* See the fourth row of the second table above */
+ if (dma_enabled) {
+ if (dma_state == DMA_PHYS_LIMIT_UNKNOWN)
+ skip_low_res = 1;
+ else
+ skip_res = 1;
+ }
+
crash_max = CRASH_ADDR_HIGH_MAX;
} else if (ret || !crash_size) {
/* The specified value is invalid */
return;
+ } else {
+ /* See the 1-2 rows of the second table above, NOP */
+ if ((!dma_enabled && (dma_state == DMA_PHYS_LIMIT_KNOWN)) ||
+ (dma_enabled && (dma_state == DMA_PHYS_LIMIT_UNKNOWN)))
+ return;
+ }
+
+ if (skip_res) {
+ crash_base = crashk_res.start;
+ crash_size = crashk_res.end - crashk_res.start + 1;
+ goto check_low;
}
fixed_base = !!crash_base;
@@ -202,9 +254,18 @@ static void __init reserve_crashkernel(int dma_state)
return;
}
+ crashk_res.start = crash_base;
+ crashk_res.end = crash_base + crash_size - 1;
+
+check_low:
+ if (skip_low_res)
+ return;
+
if ((crash_base >= CRASH_ADDR_LOW_MAX) &&
crash_low_size && reserve_crashkernel_low(crash_low_size)) {
memblock_phys_free(crash_base, crash_size);
+ crashk_res.start = 0;
+ crashk_res.end = 0;
return;
}
@@ -219,8 +280,6 @@ static void __init reserve_crashkernel(int dma_state)
if (crashk_low_res.end)
kmemleak_ignore_phys(crashk_low_res.start);
- crashk_res.start = crash_base;
- crashk_res.end = crash_base + crash_size - 1;
insert_resource(&iomem_resource, &crashk_res);
}
--
2.25.1
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