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Date: Mon, 13 Jun 2022 21:29:46 +0000 From: David Laight <David.Laight@...LAB.COM> To: "'Luck, Tony'" <tony.luck@...el.com>, "Lobakin, Alexandr" <alexandr.lobakin@...el.com>, Marco Elver <elver@...gle.com> CC: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>, Arnd Bergmann <arnd@...db.de>, Yury Norov <yury.norov@...il.com>, Mark Rutland <mark.rutland@....com>, Matt Turner <mattst88@...il.com>, Brian Cain <bcain@...cinc.com>, Geert Uytterhoeven <geert@...ux-m68k.org>, "Yoshinori Sato" <ysato@...rs.sourceforge.jp>, Rich Felker <dalias@...c.org>, "David S. Miller" <davem@...emloft.net>, Kees Cook <keescook@...omium.org>, "Peter Zijlstra (Intel)" <peterz@...radead.org>, Borislav Petkov <bp@...e.de>, "Greg Kroah-Hartman" <gregkh@...uxfoundation.org>, "linux-alpha@...r.kernel.org" <linux-alpha@...r.kernel.org>, "linux-hexagon@...r.kernel.org" <linux-hexagon@...r.kernel.org>, "linux-ia64@...r.kernel.org" <linux-ia64@...r.kernel.org>, "linux-m68k@...ts.linux-m68k.org" <linux-m68k@...ts.linux-m68k.org>, "linux-sh@...r.kernel.org" <linux-sh@...r.kernel.org>, "sparclinux@...r.kernel.org" <sparclinux@...r.kernel.org>, "linux-arch@...r.kernel.org" <linux-arch@...r.kernel.org>, "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org> Subject: RE: [PATCH v2 2/6] bitops: always define asm-generic non-atomic bitops From: Luck, Tony > Sent: 13 June 2022 17:27 > > >> It's listed in Documentation/atomic_bitops.txt. > > > > Oh, so my memory was actually correct that I saw it in the docs > > somewhere. > > WDYT, should I mention this here in the code (block comment) as well > > that it's atomic and must not lose `volatile` as Andy suggested or > > it's sufficient to have it in the docs (+ it's not underscored)? > > I think a comment that the "volatile" is required to prevent re-ordering > is enough. > > But maybe others are sufficiently clear on the meaning? I once wasted > time looking for the non-atomic __test_bit() version (to use in some code > that was already protected by a spin lock, so didn't need the overhead > of an "atomic" version) before realizing there wasn't a non-atomic one. Does it make any sense for 'test bit' to be atomic? I'm not even sure is needs any ordering constraints either. The result is always stale - the value can be changed by another cpu at any time. The set/clear atomic bit-ops require a RMW bus cycle - which has to be locked (or similar) to avoid corruption. The atomic 'test and set' (etc) are RMW and return a valid state. David - Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK Registration No: 1397386 (Wales)
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