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Message-ID: <20220614153306.29339-2-quic_tdas@quicinc.com>
Date: Tue, 14 Jun 2022 21:03:04 +0530
From: Taniya Das <quic_tdas@...cinc.com>
To: Stephen Boyd <sboyd@...nel.org>,
Michael Turquette <mturquette@...libre.com>,
Bjorn Andersson <bjorn.andersson@...aro.org>
CC: <linux-arm-msm@...r.kernel.org>, <linux-soc@...r.kernel.org>,
<linux-clk@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<devicetree@...r.kernel.org>, <robh@...nel.org>,
<robh+dt@...nel.org>, Taniya Das <quic_tdas@...cinc.com>
Subject: [PATCH v5 1/3] dt-bindings: clock: Add resets for LPASS audio clock controller for SC7280
Add support for LPASS audio clock gating for RX/TX/SWA core bus clocks
for SC7280. Update reg property min/max items in YAML schema.
Fixes: 4185b27b3bef ("dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280").
Acked-by: Rob Herring <robh@...nel.org>
Signed-off-by: Taniya Das <quic_tdas@...cinc.com>
---
.../clock/qcom,sc7280-lpasscorecc.yaml | 19 ++++++++++++++++---
.../clock/qcom,lpassaudiocc-sc7280.h | 5 +++++
2 files changed, 21 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml
index bad9135489de..1d20cdcc69ff 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml
@@ -22,6 +22,8 @@ properties:
clock-names: true
+ reg: true
+
compatible:
enum:
- qcom,sc7280-lpassaoncc
@@ -38,8 +40,8 @@ properties:
'#power-domain-cells':
const: 1
- reg:
- maxItems: 1
+ '#reset-cells':
+ const: 1
required:
- compatible
@@ -69,6 +71,11 @@ allOf:
items:
- const: bi_tcxo
- const: lpass_aon_cc_main_rcg_clk_src
+
+ reg:
+ items:
+ - description: lpass core cc register
+ - description: lpass audio csr register
- if:
properties:
compatible:
@@ -90,6 +97,8 @@ allOf:
- const: bi_tcxo_ao
- const: iface
+ reg:
+ maxItems: 1
- if:
properties:
compatible:
@@ -108,6 +117,8 @@ allOf:
items:
- const: bi_tcxo
+ reg:
+ maxItems: 1
examples:
- |
#include <dt-bindings/clock/qcom,rpmh.h>
@@ -116,13 +127,15 @@ examples:
#include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
lpass_audiocc: clock-controller@...0000 {
compatible = "qcom,sc7280-lpassaudiocc";
- reg = <0x3300000 0x30000>;
+ reg = <0x3300000 0x30000>,
+ <0x32a9000 0x1000>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&lpass_aon LPASS_AON_CC_MAIN_RCG_CLK_SRC>;
clock-names = "bi_tcxo", "lpass_aon_cc_main_rcg_clk_src";
power-domains = <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>;
#clock-cells = <1>;
#power-domain-cells = <1>;
+ #reset-cells = <1>;
};
- |
diff --git a/include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h b/include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h
index 20ef2ea673f3..22dcd47d4513 100644
--- a/include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h
+++ b/include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h
@@ -24,6 +24,11 @@
#define LPASS_AUDIO_CC_RX_MCLK_CLK 14
#define LPASS_AUDIO_CC_RX_MCLK_CLK_SRC 15
+/* LPASS AUDIO CC CSR */
+#define LPASS_AUDIO_SWR_RX_CGCR 0
+#define LPASS_AUDIO_SWR_TX_CGCR 1
+#define LPASS_AUDIO_SWR_WSA_CGCR 2
+
/* LPASS_AON_CC clocks */
#define LPASS_AON_CC_PLL 0
#define LPASS_AON_CC_PLL_OUT_EVEN 1
--
2.17.1
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