lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Date: Tue, 14 Jun 2022 20:39:47 +0200 From: Greg Kroah-Hartman <gregkh@...uxfoundation.org> To: linux-kernel@...r.kernel.org Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>, stable@...r.kernel.org, Dave Hansen <dave.hansen@...ux.intel.com>, Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>, "H. Peter Anvin" <hpa@...or.com>, x86@...nel.org, Tony Luck <tony.luck@...el.com>, Megha Dey <megha.dey@...ux.intel.com>, Rajneesh Bhardwaj <rajneesh.bhardwaj@...el.com>, Andy Shevchenko <andriy.shevchenko@...ux.intel.com>, Thadeu Lima de Souza Cascardo <cascardo@...onical.com> Subject: [PATCH 4.9 04/20] x86/cpu: Add Cannonlake to Intel family From: Rajneesh Bhardwaj <rajneesh.bhardwaj@...el.com> commit 850eb9fba3711e98bafebde26675d9c082c0ff48 upstream. Add CPUID of Cannonlake (CNL) processors to Intel family list. Cc: Dave Hansen <dave.hansen@...ux.intel.com> Cc: Thomas Gleixner <tglx@...utronix.de> cc: Ingo Molnar <mingo@...hat.com> Cc: "H. Peter Anvin" <hpa@...or.com> Cc: x86@...nel.org Reviewed-by: Thomas Gleixner <tglx@...utronix.de> Suggested-by: Tony Luck <tony.luck@...el.com> Signed-off-by: Megha Dey <megha.dey@...ux.intel.com> Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@...el.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com> Signed-off-by: Thadeu Lima de Souza Cascardo <cascardo@...onical.com> Signed-off-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org> --- arch/x86/include/asm/intel-family.h | 6 ++++++ 1 file changed, 6 insertions(+) --- a/arch/x86/include/asm/intel-family.h +++ b/arch/x86/include/asm/intel-family.h @@ -9,6 +9,10 @@ * * Things ending in "2" are usually because we have no better * name for them. There's no processor called "SILVERMONT2". + * + * While adding a new CPUID for a new microarchitecture, add a new + * group to keep logically sorted out in chronological order. Within + * that group keep the CPUID for the variants sorted by model number. */ #define INTEL_FAM6_CORE_YONAH 0x0E @@ -48,6 +52,8 @@ #define INTEL_FAM6_KABYLAKE_MOBILE 0x8E #define INTEL_FAM6_KABYLAKE_DESKTOP 0x9E +#define INTEL_FAM6_CANNONLAKE_MOBILE 0x66 + /* "Small Core" Processors (Atom) */ #define INTEL_FAM6_ATOM_BONNELL 0x1C /* Diamondville, Pineview */
Powered by blists - more mailing lists