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Date: Mon, 13 Jun 2022 22:06:28 -0400 From: Sasha Levin <sashal@...nel.org> To: linux-kernel@...r.kernel.org, stable@...r.kernel.org Cc: Sherry Wang <YAO.WANG1@....com>, Nicholas Kazlauskas <Nicholas.Kazlauskas@....com>, Jasdeep Dhillon <jdhillon@....com>, Daniel Wheeler <daniel.wheeler@....com>, Alex Deucher <alexander.deucher@....com>, Sasha Levin <sashal@...nel.org>, christian.koenig@....com, airlied@...ux.ie, dri-devel@...ts.freedesktop.org Subject: [PATCH AUTOSEL 5.15 03/41] drm/amd/display: Read Golden Settings Table from VBIOS From: Sherry Wang <YAO.WANG1@....com> [ Upstream commit 4b81dd2cc6f4f4e8cea0ed6ee8d5193a8ae14a72 ] [Why] Dmub read AUX_DPHY_RX_CONTROL0 from Golden Setting Table, but driver will set it to default value 0x103d1110, which causes issue in some case [How] Remove the driver code, use the value set by dmub in dp_aux_init Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@....com> Acked-by: Jasdeep Dhillon <jdhillon@....com> Tested-by: Daniel Wheeler <daniel.wheeler@....com> Signed-off-by: Sherry Wang <YAO.WANG1@....com> Signed-off-by: Alex Deucher <alexander.deucher@....com> Signed-off-by: Sasha Levin <sashal@...nel.org> --- drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c index b0892443fbd5..c7c27a605f15 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c +++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_dio_link_encoder.c @@ -168,9 +168,7 @@ void enc31_hw_init(struct link_encoder *enc) AUX_RX_PHASE_DETECT_LEN, [21,20] = 0x3 default is 3 AUX_RX_DETECTION_THRESHOLD [30:28] = 1 */ - AUX_REG_WRITE(AUX_DPHY_RX_CONTROL0, 0x103d1110); - - AUX_REG_WRITE(AUX_DPHY_TX_CONTROL, 0x21c7a); + // dmub will read AUX_DPHY_RX_CONTROL0/AUX_DPHY_TX_CONTROL from vbios table in dp_aux_init //AUX_DPHY_TX_REF_CONTROL'AUX_TX_REF_DIV HW default is 0x32; // Set AUX_TX_REF_DIV Divider to generate 2 MHz reference from refclk -- 2.35.1
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