lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Tue, 14 Jun 2022 23:14:07 +0300
From:   Serge Semin <fancer.lancer@...il.com>
To:     Rob Herring <robh@...nel.org>
Cc:     Serge Semin <Sergey.Semin@...kalelectronics.ru>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        Jingoo Han <jingoohan1@...il.com>,
        Gustavo Pimentel <gustavo.pimentel@...opsys.com>,
        Krzysztof WilczyƄski <kw@...ux.com>,
        Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>,
        Pavel Parkhomenko <Pavel.Parkhomenko@...kalelectronics.ru>,
        Frank Li <Frank.Li@....com>,
        Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
        linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 09/18] PCI: dwc: Discard IP-core version checking on
 unrolled iATU detection

On Mon, Jun 13, 2022 at 02:20:47PM -0600, Rob Herring wrote:
> On Fri, Jun 10, 2022 at 11:25:25AM +0300, Serge Semin wrote:
> > It's pretty much pointless. Even though unrolled version of the internal
> > ATU has been indeed available since DWC PCIe v4.80a IP-core, there is no
> > guarantee it was enabled during the IP-core configuration (Synopsys
> > suggests to contact the Solvnet support for guidance of how to do that for
> > the newer IP-cores). So the only reliable way to find out the unrolled
> > iATU feature availability is indeed to check the iATU viewport register
> > content. In accordance with the reference manual [1] if the register
> > doesn't exist (unrolled iATU is enabled) it's content is fixed with
> > 0xff-s, otherwise it will contain some zeros. So we can freely drop the
> > IP-core version checking in this matter then and use the
> > dw_pcie_iatu_unroll_enabled() method only to detect whether iATU/eDMA
> > space is unrolled.
> 

> Are you sure that pre v4.80a, it is safe to read the register address? 

v4.60a ref manual says that the register exists in case if
(!CX_PL_REG_DISABLE && CX_INTERNAL_ATU_ENABLE)
and no word regarding all 1s. Most likely it shall have all zeros by
default and if there is no iATU available.

> Seems unlikely that the all 1s guarantee would be valid before the 
> feature ever existed. 

Right, all 1s is the marker of the unrolled iATU mapping, which has
been available since v4.80a. So before that version we were never
supposed to meet all 1s in that registers.

> 
> 
> > [1] DesignWare Cores, PCI Express Controller, Register Desciptions,
> > v.4.90a, December 2016, p.855
> > 
> > Signed-off-by: Serge Semin <Sergey.Semin@...kalelectronics.ru>
> > Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> > Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> > ---
> >  drivers/pci/controller/dwc/pcie-designware.c | 11 +++++------
> >  1 file changed, 5 insertions(+), 6 deletions(-)
> 
> Assuming this works,
> 
> Reviewed-by: Rob Herring <robh@...nel.org>

Thanks.

-Sergey

Powered by blists - more mailing lists