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Message-ID: <57d11a55-beba-c91b-e168-989417e3910d@linaro.org>
Date: Tue, 14 Jun 2022 13:58:35 -0700
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Vadym Kochan <vadym.kochan@...ision.eu>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>,
Chris Packham <chris.packham@...iedtelesis.co.nz>,
Gregory CLEMENT <gregory.clement@...tlin.com>,
Konstantin Porotchkin <kostap@...vell.com>,
Andrew Lunn <andrew@...n.ch>,
Robert Marko <robert.marko@...tura.hr>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v9 1/3] dt-bindings: marvell: Document the AC5/AC5X
compatibles
On 13/06/2022 15:53, Vadym Kochan wrote:
> From: Chris Packham <chris.packham@...iedtelesis.co.nz>
>
> Describe the compatible properties for the Marvell Alleycat5/5X switches
> with integrated CPUs.
>
> Alleycat5:
> * 98DX2538: 24x1G + 2x10G + 2x10G Stack
> * 98DX2535: 24x1G + 4x1G Stack
> * 98DX2532: 8x1G + 2x10G + 2x1G Stack
> * 98DX2531: 8x1G + 4x1G Stack
> * 98DX2528: 24x1G + 2x10G + 2x10G Stack
> * 98DX2525: 24x1G + 4x1G Stack
> * 98DX2522: 8x1G + 2x10G + 2x1G Stack
> * 98DX2521: 8x1G + 4x1G Stack
> * 98DX2518: 24x1G + 2x10G + 2x10G Stack
> * 98DX2515: 24x1G + 4x1G Stack
> * 98DX2512: 8x1G + 2x10G + 2x1G Stack
> * 98DX2511: 8x1G + 4x1G Stack
>
> Alleycat5X:
> * 98DX3500: 24x1G + 6x25G
> * 98DX3501: 16x1G + 6x10G
> * 98DX3510: 48x1G + 6x25G
> * 98DX3520: 24x2.5G + 6x25G
> * 98DX3530: 48x2.5G + 6x25G
> * 98DX3540: 12x5G/6x10G + 6x25G
> * 98DX3550: 24x5G/12x10G + 6x25G
>
> Signed-off-by: Chris Packham <chris.packham@...iedtelesis.co.nz>
> Signed-off-by: Vadym Kochan <vadym.kochan@...ision.eu>
> ---
>
> Notes:
> Changes in v9:
> - Renamed $id with "ac5" prefix
I guess this was the reason to drop review? Anyway this is unexpected
change considering the name does not appear in compatibles.
> Changes in v8:
> - Add review from Krzysztof
Best regards,
Krzysztof
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