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Message-Id: <20220614233328.3896033-1-seanjc@google.com>
Date:   Tue, 14 Jun 2022 23:33:20 +0000
From:   Sean Christopherson <seanjc@...gle.com>
To:     Paolo Bonzini <pbonzini@...hat.com>
Cc:     Sean Christopherson <seanjc@...gle.com>,
        Vitaly Kuznetsov <vkuznets@...hat.com>,
        Wanpeng Li <wanpengli@...cent.com>,
        Jim Mattson <jmattson@...gle.com>,
        Joerg Roedel <joro@...tes.org>, kvm@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        Lai Jiangshan <jiangshan.ljs@...group.com>
Subject: [PATCH v2 0/8] KVM: x86/mmu: Use separate namespaces gPTEs and SPTEs

This is based on kvm/queue + "Remove unused PT32_DIR_BASE_ADDR_MASK from mmu.c",
so I think it should apply cleanly on top of what you already grabbed.

Clean up the x86 MMU code to use separate namespaces for guest PTEs and
shadow PTEs.  While there is most definitely overlap, especially in
attribute bits, the rules for walking gPTEs and for generating/walking
SPTEs differ in subtle ways, e.g. see commit fc9bf2e087ef ("KVM: x86/mmu:
Do not apply HPA (memory encryption) mask to GPAs").  The paging32 macros
in particular should never be used outside of paging_tmpl.h.

Separating gPTEs from SPTEs actually provides for nice cleanups (see the
diffstat) as KVM has ended up with a fair bit of copy+paste code that can
be deduplicated once KVM isn't trying to use PT64_* defines for both gPTEs
and SPTEs.

This is a spiritual successor to patches 4-7 of the series[*] that added
the aformentenioned commit.

v2:
  - Don't move is_cpuid_PSE36(). [Lai Jiangshan]
  - Change author for patch 1 (yeah, I was lazy). [Lai Jiangshan]
  - Fix a random typo in patch 7's changelog.
  - Rebase to play nice with PT32_DIR_BASE_ADDR_MASK.

v1: https://lore.kernel.org/all/20220613225723.2734132-2-seanjc@google.com

[*] https://lore.kernel.org/all/20210623230552.4027702-1-seanjc@google.com

Lai Jiangshan (1):
  KVM: x86/mmu: Drop unused CMPXCHG macro from paging_tmpl.h

Sean Christopherson (7):
  KVM: VMX: Refactor 32-bit PSE PT creation to avoid using MMU macro
  KVM: x86/mmu: Bury 32-bit PSE paging helpers in paging_tmpl.h
  KVM: x86/mmu: Dedup macros for computing various page table masks
  KVM: x86/mmu: Use separate namespaces for guest PTEs and shadow PTEs
  KVM: x86/mmu: Use common macros to compute 32/64-bit paging masks
  KVM: x86/mmu: Truncate paging32's PT_BASE_ADDR_MASK to 32 bits
  KVM: x86/mmu: Use common logic for computing the 32/64-bit base PA
    mask

 arch/x86/kvm/mmu.h              | 10 ------
 arch/x86/kvm/mmu/mmu.c          | 57 +++++++++------------------------
 arch/x86/kvm/mmu/mmu_internal.h | 17 ++++++++++
 arch/x86/kvm/mmu/paging.h       | 14 --------
 arch/x86/kvm/mmu/paging_tmpl.h  | 55 ++++++++++++++++---------------
 arch/x86/kvm/mmu/spte.c         |  2 +-
 arch/x86/kvm/mmu/spte.h         | 28 +++++++---------
 arch/x86/kvm/mmu/tdp_iter.c     |  6 ++--
 arch/x86/kvm/mmu/tdp_mmu.c      |  6 ++--
 arch/x86/kvm/vmx/vmx.c          |  2 +-
 10 files changed, 82 insertions(+), 115 deletions(-)
 delete mode 100644 arch/x86/kvm/mmu/paging.h


base-commit: ccf1c220033d8d6fe50d8d11daa3dec5640f8c4d
-- 
2.36.1.476.g0c4daa206d-goog

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