linux-kernel - Re: [PATCH v5 12/15] spi: dw: Add support for AMD Pensando Elba SoC

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Message-ID: <CAHp75Vex0VkECYd=kY0m6=jXBYSXg2UFu7vn271+Q49WZn22GA@mail.gmail.com>
Date:   Tue, 14 Jun 2022 13:10:20 +0200
From:   Andy Shevchenko <andy.shevchenko@...il.com>
To:     Brad Larson <brad@...sando.io>
Cc:     linux-arm Mailing List <linux-arm-kernel@...ts.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        linux-mmc <linux-mmc@...r.kernel.org>,
        Adrian Hunter <adrian.hunter@...el.com>,
        Al Cooper <alcooperx@...il.com>, Arnd Bergmann <arnd@...db.de>,
        blarson@....com, brijeshkumar.singh@....com,
        Catalin Marinas <catalin.marinas@....com>,
        Gabriel Somlo <gsomlo@...il.com>, gerg@...ux-m68k.org,
        Krzysztof Kozlowski <krzk@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Lee Jones <lee.jones@...aro.org>,
        Mark Brown <broonie@...nel.org>,
        Masahiro Yamada <yamada.masahiro@...ionext.com>,
        Philipp Zabel <p.zabel@...gutronix.de>, piotrs@...ence.com,
        Pratyush Yadav <p.yadav@...com>,
        Randy Dunlap <rdunlap@...radead.org>,
        Rob Herring <robh+dt@...nel.org>, samuel@...lland.org,
        Serge Semin <fancer.lancer@...il.com>,
        suravee.suthikulpanit@....com,
        Tom Lendacky <thomas.lendacky@....com>,
        Ulf Hansson <ulf.hansson@...aro.org>,
        Will Deacon <will@...nel.org>,
        devicetree <devicetree@...r.kernel.org>
Subject: Re: [PATCH v5 12/15] spi: dw: Add support for AMD Pensando Elba SoC

On Mon, Jun 13, 2022 at 9:57 PM Brad Larson <brad@...sando.io> wrote:
>
> From: Brad Larson <blarson@....com>
>
> The AMD Pensando Elba SoC includes a DW apb_ssi v4 controller
> with device specific chip-select control.  The Elba SoC
> provides four chip-selects where the native DW IP supports
> two chip-selects.  The Elba DW_SPI instance has two native
> CS signals that are always overridden.

...

> +/*
> + * Elba SoC does not use ssi, pin override is used for cs 0,1 and
> + * gpios for cs 2,3 as defined in the device tree.
> + *
> + * cs:  |       1               0
> + * bit: |---3-------2-------1-------0
> + *      |  cs1   cs1_ovr   cs0   cs0_ovr
> + */

> +#define ELBA_SPICS_SHIFT(cs)           (2 * (cs))

Useless.It takes much more than simply multiplying each time in two
macros. Also see below.

> +#define ELBA_SPICS_MASK(cs)            (0x3 << ELBA_SPICS_SHIFT(cs))

(GENMASK(1, 0) << ((cs) << 1))

Or ((cs) * 2) to show that it takes 2 bits and not two times of CS',

> +#define ELBA_SPICS_SET(cs, val)        \
> +                       ((((val) << 1) | 0x1) << ELBA_SPICS_SHIFT(cs))

BIT(0)

So the main point is to use GENMASK() and BIT() the rest is up to you.

-- 
With Best Regards,
Andy Shevchenko